SH7670 datasheet(10/1292 Pages) RENESAS

10 / 1292 page

Rev. 1.00 Nov. 14, 2007 Page x of xxvi

Section 3 Floating-Point Unit (FPU)................................................................... 75

3.1

Features............................................................................................................................... 75

3.2

Data Formats....................................................................................................................... 76

3.2.1

Floating-Point Format......................................................................................... 76

3.2.2

Non-Numbers (NaN) .......................................................................................... 79

3.2.3

Denormalized Numbers ...................................................................................... 80

3.3

Register Descriptions.......................................................................................................... 81

3.3.1

Floating-Point Registers ..................................................................................... 81

3.3.2

Floating-Point Status/Control Register (FPSCR) ............................................... 82

3.3.3

Floating-Point Communication Register (FPUL) ............................................... 83

3.4

Rounding ............................................................................................................................ 84

3.5

Floating-Point Exceptions................................................................................................... 85

3.5.1

FPU Exception Sources ...................................................................................... 85

3.5.2

FPU Exception Handling .................................................................................... 86

Section 4 Cache ................................................................................................... 87

4.1

Features............................................................................................................................... 87

4.1.1

Cache Structure................................................................................................... 87

4.2

Register Descriptions.......................................................................................................... 90

4.2.1

Cache Control Register 1 (CCR1) ...................................................................... 90

4.2.2

Cache Control Register 2 (CCR2) ...................................................................... 92

4.3

Operation ............................................................................................................................ 96

4.3.1

Searching Cache ................................................................................................. 96

4.3.2

Read Access........................................................................................................ 98

4.3.3

Prefetch Operation (Only for Operand Cache) ................................................... 98

4.3.4

Write Operation (Only for Operand Cache) ....................................................... 99

4.3.5

Write-Back Buffer (Only for Operand Cache).................................................... 99

4.3.6

Coherency of Cache and External Memory ...................................................... 101

4.4

Memory-Mapped Cache ................................................................................................... 102

4.4.1

Address Array ................................................................................................... 102

4.4.2

Data Array ........................................................................................................ 103

4.4.3

Usage Examples................................................................................................ 105

4.4.4

Notes................................................................................................................. 105

Section 5 Exception Handling ........................................................................... 107

5.1

Overview .......................................................................................................................... 107

5.1.1

Types of Exception Handling and Priority ....................................................... 107

5.1.2

Exception Handling Operations ........................................................................ 109

5.1.3

Exception Handling Vector Table .................................................................... 111

5.2

Resets................................................................................................................................ 113

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