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SH7670 Datasheet(PDF) 45 Page - Renesas Technology Corp |
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SH7670 Datasheet(HTML) 45 Page - Renesas Technology Corp |
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45 / 1292 page ![]() Section 1 Overview Rev. 1.00 Nov. 14, 2007 Page 19 of 1262 REJ09B0437-0100 Classification Symbol I/O Name Function DG12 I Ground for transceiver pins Ground pin for transceiver pins UV12 I Digital power supply for transceiver Power supply pin for the core (1.2V (Typ) supplied) USB2.0 host/function module (USB) UG12 I Digital ground for transceiver Ground pin for the core SDCLK O SD clock SD clock output pin SDCMD I/O SD command SD command output/response input signal pin SDDATA3 to SDDATA0 I/O SD data SD data bus signal pins SDCD I SD card detect SD card detection pin SD host interface (SDHI) SDWP I SD write protect SD write protect signal pin SCL I/O Serial clock pin Serial clock I/O pin I 2C bus interface 3 (IIC3) SDA I/O Serial data pin Serial data I/O pin HIFD15 to HIFD00 I/O HIF data bus HIF address, data, and command I/O pins HIFCS I HIF chip select Input pin to receive the HIF chip select signal HIFRS I HIF register select Pin for access type switching instruction to the HIF HIFWR I HIF write Write strobe signal pin HIFRD I HIF read Read strobe signal pin HIFINT O HIF interrupt Pin to make an interrupt request from the HIF to the external device HIFMD I HIF mode Pin to specify HIF boot mode HIFDREQ O HIFDMAC transfer request Pin to request the external device for DMA transfer to the HIFRAM HIFEBL I HIF pin enable A high-level input on this pin activates all the HIF pins other than this pin. Host interface (HIF) HIFRDY O HIF boot ready Indicates that the HIF module reset was canceled in this LSI and that accesses to the HIF module from the external device are acceptable. |
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