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SH7670 Datasheet(PDF) 42 Page - Renesas Technology Corp |
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SH7670 Datasheet(HTML) 42 Page - Renesas Technology Corp |
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42 / 1292 page ![]() Section 1 Overview Rev. 1.00 Nov. 14, 2007 Page 16 of 1262 REJ09B0437-0100 Classification Symbol I/O Name Function DQMUL O Second byte select Selects data bus bits 23 to 16 of SDRAM. DQMLU O Third byte select Selects data bus bits 15 to 8 of SDRAM. DQMLL O Least significant byte select Selects data bus bits 7 to 0 of SDRAM. CE1A O PCMCIA card select (lower) Chip enable signal pin for PCMCIA connected to area 5 CE1B O PCMCIA card select (lower) Chip enable signal pin for PCMCIA connected to area 6 CE2A O PCMCIA card select (upper) Chip enable signal pin for PCMCIA connected to area 5 CE2B O PCMCIA card select (upper) Chip enable signal pin for PCMCIA connected to area 6 ICIOWR O PCMCIA I/O write strobe Pin connected to the PCMCIA I/O write strobe ICIORD O PCMCIA I/O read strobe Pin connected to the PCMCIA I/O read strobe WE O PCMCIA memory write strobe Pin connected to the PCMCIA memory write strobe Bus control IOIS16 I PCMCIA dynamic bus sizing Indicates the 16-bit I/O of PCMCIA in little-endian mode. Fix this pin low in big-endian mode. DREQ0, DREQ1 I DMA-transfer request Input pins to receive external requests for DMA transfer DACK0, DACK1 O DMA-transfer request acknowledge Output pins for signals indicating acknowledge of external requests from external devices Direct memory access controller (DMAC) TEND0, TEND1 O DMA-transfer end output Output pins for DMA transfer end CRS I Carrier sense Carrier sensing pin COL I Collision Collision detecting pin MII_TXD3 to MII_TXD0 O Transmit data 4-bit transmit data pins Ethernet controller (EtherC) TX_EN O Transmit enable Indicates that transmit data is ready on the MII_TXD3 to MII_TXD0 pins. |
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