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SH7750 Datasheet(PDF) 44 Page - Renesas Technology Corp

Part # SH7750
Description  32-Bit RISC Microcomputer
PDF  1162 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7750 Datasheet(HTML) 44 Page - Renesas Technology Corp

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Rev.7.00 Oct. 10, 2008 Page xliv of lxxxiv
REJ09B0366-0700
Item
Page
Revision (See Manual for Details)
E.1 Pin States
Table E.1 Pin States in
Reset, Power-Down
State, and Bus-
Released State
1034
Reset
(Power-On)
Reset
(Manual)
Signal Name
I/O
Master
Slave
Master
Slave
Standby
Bus
Released
Hardware
Standby
WE1/CAS1/DQM1
H
PZ
O
Z*
13
Z*
13O*4
Z*
13O*4
WE0/CAS0/DQM0
H
PZ
O
Z*
13
Z*
13O*4
Z*
13O*4
DACK1–DACK0
O
L
L
L
L
Z*
11O*7
O
MD7/TXD
I/O
I/O
PI*
14
PI*
14
Z*
11
Z*
11
Z*
11K*18O*7 Z*11K*18O*7
MD6/
IOIS16
I
PI*
14
PI*
14
I*
12
I*
12
Z*
12
I*
12
MD5/
RAS2I/O
*
1
PI*
14
PI*
14
Z*
13O*5
Z*
13
Z*
13O*4
Z*
13O*4
MD4/
CE2BI/O
*
3
PI*
14
PI*
14
Z*
13H*6
Z*
13
Z*
13H*6
Z*
13
MD3/
CE2AI/O
I/O
I/O
I/O*
2
PI*
14
PI*
14
Z*
13H*6
Z*
13
Z*
13H*6
Z*
13
CKIO
O
O
O
O*
10Z*10 O*10Z*10 PZ
O*
10Z*10
STATUS1–STATUS0
O
O
O
O
O
O
O
*
16
IRL3–IRL0
I
I
I
I
I
I
PI
PI
I*
12
I*
12
I*
12
I*
12
NMI
PI
PI
I*
12
I*
12
I*
12
I*
12
DREQ1–DREQ0
PI
PI
I*
11
I*
11
Z*
11
I*
11
DRAK1–DRAK0
O
L
L
L
L
Z*
11O*7
O
MD0/SCK
PI*
14
PI*
14
I*
11
I*
11
I
*
11K
Z
*
18O*7 *
11OK*18
RXD
PI
PI
I*
11
I*
11
Z*
11
I*
11
SCK2/
MRESET
PI
PI
I*
11
I*
11
I*
11
I*
11
MD1/TXD2
I/O
PI*
14
PI*
14
Z*
11
Z*
11
Z*
11
K*
18
O*
7
O*
7
Z*
11
K*
18
MD2/RXD2
PI*
14
PI*
14
I*
11
I*
11
Z*
11
I*
11
CTS2
I/O
PI
PI
I*
11
I*
11
Z*
11K*18
I*
11K*18
MD8/
RTS2
I/O
PI*
14
PI*
14
I*
11
I*
11
Z*
11K*18
I*
11K*18
TCLK
I/O
PI
PI
I*
11
I*
11
K*
11O*17
I*
11O*17
TDO
O
O
O
O
O
O
TMS
I
PI
PI
PI
PZ
PI
TCK
I
PI
PI
PI
PZ
PI
TDI
I
PI
PI
PI
PZ
PI
TRST
I
PI
PI
PI
O
PI
PI
PI
PI
PZ
PI
CKIO2*
21
OPZ*
20O*9 PZ*20O*9
PZ*
20
*
920
O*
PZ*
20
*
920
O*
PZ
PZ *
20O*9 *20
Z
Z
Z
Z
Z
Z
Z
Z
Z
ZO
I
I
I
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
O
O
1035
Reset
(Power-On)
Reset
(Manual)
Signal Name
I/O
Master
Slave
Master
Slave
Standby
Bus
Released
Hardware
Standby
RD2*21
OZ*
20PZ*9
Z*
13 *20
O*
9
Z*
9*13
Z*
9*13 O*4 Z*9*13 O*4 Z
RD/
WR2*21
OZ*
20
H*
9 *
20
Z*
20
H*
9 *
20
Z*
20PZ*9
Z*
13*20
H*
9
Z*
9*13
Z*
9*13 H*4
Z*
9*13
Z
CKIO2ENB
I
PI
PI
PI
PI
PI
PI
Z
CA
I
I
I
I
I
I
I
I
ASEBRK/BRKACK
I/O
PI*
22O*22 PI*22O*22
PI*
22O*22 PI*22O*22 PI*22O*22
PI*
22O*22
Z
Legend:
I: Input (not Pulled Up)
O: Output
Z: High-impedance (not Pulled Up)
H: High-level output
L: Low-level output
K: Output state held



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