SH7750 datasheet(7/1162 Pages) RENESAS

7 / 1162 page

Rev.7.00 Oct. 10, 2008 Page vii of lxxxiv

REJ09B0366-0700

Main Revisions for This Edition

Item

Page

Revision (See Manual for Details)

All

⎯

• Notification of change in company name amended

(Before) Hitachi, Ltd.

→ (After) Renesas Technology Corp.

Description amended

φ → Ick

φ → Bck

φ → Pck

1.1 SH7750, SH7750S,

SH7750R Groups

Features

Description amended

This LSI (SH7750, SH7750S, and SH7750R Groups) is a 32-bit

RISC (reduced instruction set computer) microprocessor with a

SH-4 CPU core and features upward compatibility with SH-1,

SH-2, and SH-3 microcomputers at the instruction set level.

Table 1.1 LSI Features 1 to 3, 8 Table amended

SH-1, SH-2, and SH-3)

Item

Features

LSI

• Superscalar architecture: Parallel execution of two instructions

• External buses

⎯ Separate 26-bit address and 64-bit data buses

⎯ External bus frequency of 1/2, 1/3, 1/4, 1/6, or 1/8 times internal bus

frequency

CPU

• RISC-type instruction set (upward-compatible with

FPU

• Floating-point registers: 32 bits × 16 × 2 banks

(single-precision 32 bits

× 16 or double-precision 64 bits × 8)

× 2 banks

Product lineup

Abbre-

viation

Voltage

(Internal)

Operating

Frequency

Model No.

Package

SH7750

1.95 V

200 MHz

HD6417750BP200M

256-pin BGA

1.8 V

167 MHz

HD6417750F167

1.5 V

128 MHz

HD6417750VF128

208-pin QFP

SH7750S

1.95 V

200 MHz

HD6417750SBP200

256-pin BGA

HD6417750SF200

1.8 V

167 MHz

HD6417750SF167

1.5 V

133 MHz

HD6417750SVF133

208-pin QFP

HD6417750SVBT133

264-pin CSP

SH7750R

1.5 V

240 M

200 MHz

HD6417750RBG240

292-pin BGA

HD6417750RBP240

256-pin BGA

HD6417750RF240

208-pin QFP

HD6417750RBG200

292-pin BGA

HD6417750RBP200

256-pin BGA

HD6417750RF200

208-pin QFP

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