32186 datasheet(521/1032 Pages) RENESAS

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A/D CONVERTER

11-23

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

11.2 A/D Converter Related Registers

(2) ADCMSL (A/D Scan Mode Select) bit (Bit 1)

This bit selects scan mode of the A/D Converter between single-shot scan and continuous scan.

Setting this bit to "0" selects single-shot scan mode, where the channels selected with the ANSCAN (A/D

scan loop select) bits of the A/D0 Scan Mode Register 1 (AD0SCM1) are sequentially A/D converted and

when A/D conversion on all selected channels is completed, the conversion operation stops.

Setting this bit to "1" selects continuous scan mode, where after operation in single-shot scan mode

finishes, A/D conversion is reexecuted beginning with the first channel and continued until stopped by

setting the ADCSTP (A/D conversion stop) bit to "1."

(3) ADCSEL (A/D Conversion Start Trigger Select) bit (Bit 3)

This bit selects whether to use a software or hardware trigger to start A/D conversion during scan

mode. If a software trigger is selected, A/D conversion is started by setting the ADCSTT (A/D conver-

sion start) bit to "1." If a hardware trigger is selected, A/D conversion is started by the trigger source

selected with the ADCTRG (hardware trigger select) bits.

(4) ADCREQ (A/D Interrupt Request/DMA Transfer Request Select) bit (Bit 4)

This bit selects whether to request an A/D conversion interrupt or a DMA transfer when one cycle of scan

mode operation is completed. If neither an interrupt nor a DMA transfer are used, choose to request an

A/D conversion interrupt and use the A/D Conversion Interrupt Control Register of the Interrupt Controller

(ICU) to mask the interrupt request, or choose to request a DMA transfer and use the DMA Channel

Control Register to disable DMA transfers to be performed upon completion of A/D conversion.

(5) ADCCMP (A/D Conversion Completed) bit (Bit 5)

This is a read-only bit, whose value when exiting the reset state is "1." This bit is "0" when the A/D

Converter is performing scan mode A/D conversion and is set to "1" when single-shot scan mode

finishes or continuous scan mode is stopped by setting the ADCSTP (A/D conversion stop) bit to "1."

(6) ADCSTP (A/D Conversion Stop) bit (Bit 6)

Setting this bit to "1" while the A/D Converter is performing scan mode A/D conversion causes the opera-

tion being performed to stop. This bit is effective only for scan mode operation, and does not affect single

mode operation even when single and scan modes both are active during special operation mode.

Operation stops immediately after writing to this bit, and the A/D conversion being performed on any

channel is aborted in the middle, without transferring the result to the A/D data register.

If the A/D conversion start bit and A/D conversion stop bit are set to "1" at the same time, the A/D

conversion stop bit has priority.

(7) ADCSTT (A/D Conversion Start) bit (Bit 7)

This bit is used to start scan mode operation of the A/D Converter in software. Only when a software

trigger has been selected with the ADCSEL (A/D conversion start trigger select) bit, setting this bit to

"1" causes A/D conversion to start.

If the A/D conversion start bit and A/D conversion stop bit are set to "1" at the same time, the A/D

conversion stop bit has priority.

If this bit is set to "1" again while performing scan mode conversion, special operation mode “Conver-

sion restart” is turned on, so that scan mode operation is restarted using the contents set by A/D Scan

Mode Registers 0 and 1.

If this bit is set to "1" again while performing A/D conversion in single mode, special operation mode

“Scan mode start after single mode execution” is turned on, so that scan mode operation starts subse-

quently after single mode has finished.

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