32186 datasheet(522/1032 Pages) RENESAS

522 / 1032 page

A/D CONVERTER

11-24

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

11121314

b15

ADCSPD

ADCSHSL ADCSHSPD

ANSCAN

000

0000

11.2 A/D Converter Related Registers

11.2.5 A/D Scan Mode Register 1

A/D0 Scan Mode Register 1 (AD0SCM1)

<Address: H’0080 0085>

Bit Name

Function

No function assigned. Fix to "0."

ADCSPD (Note 1)

0: Normal speed

A/D conversion speed select bit

1: Double speed

ADCSHSL

0: Disable sample-and-hold

A/D conversion method select bit

1: Enable sample-and-hold

ADCSHSPD (Note 2)

0: Normal sample-and-hold

A/D sample-and-hold conversion speed select bit

1: Fast sample-and-hold

12–15

ANSCAN

A/D scan loop select bit

‘B0000–1111 (channels 0–15)

(i = 0)

0000: Converting ADiIN0

0001: Converting ADiIN1

0010: Converting ADiIN2

0011: Converting ADiIN3

0100: Converting ADiIN4

0101: Converting ADiIN5

0110: Converting ADiIN6

0111: Converting ADiIN7

1000: Converting ADiIN8

1001: Converting ADiIN9

1010: Converting ADiIN10

1011: Converting ADiIN11

1100: Converting ADiIN12

1101: Converting ADiIN13

1110: Converting ADiIN14

1111: Converting ADiIN15

Note 1: The A/D conversion speed is determined by a combination of ADCSPD, ADCSHSL and ADCSHSPD bits and the A/D

Conversion Speed Control Register ADCVSD2 and ADCVSD bits.

Note 2: Setting of this bit is effective when the sample-and-hold function is enabled by ADCSHSL bit.

A/D Scan Mode Register 1 is used to select operation mode, conversion speed and scan loop when the

A/D Converter is operating in scan mode. The channels selected with the scan loop select bit are scanned

sequentially beginning with channel 0 (n-channel scan).

(1) ADCSPD (A/D Conversion Speed Select) bit (Bit 9)

This bit selects an A/D conversion speed when the A/D Converter is operating in scan mode. Setting

this bit to "0" selects normal speed, and setting this bit to "1" selects double speed.

(2) ADCSHSL (A/D Conversion Method Select) bit (Bit 10)

This bit enables or disables the sample-and-hold function when the A/D Converter is operating in

scan mode. Setting this bit to "0" disables the sample-and-hold function, and setting this bit to "1"

enables the sample-and-hold function.

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