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32186 Datasheet(PDF) 790 Page - Renesas Technology Corp

Part # 32186
Description  MCU
PDF  1032 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

32186 Datasheet(HTML) 790 Page - Renesas Technology Corp

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REAL TIME DEBUGGER (RTD)
15
15-4
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
Figure 15.4.1 RDR Command Data Format
31
X
0
0
1
0
19 18 17 16
A15
15
A14
14 13 12
1
A16
0
X
20
A17
A28
A29
Command (RDR)
Specified address
Note: • X = Don't care.
(However, if issued immediately after the RCV command, bits 20-31 must all be set to "1.")
RTDRXD
(MSB side)
(LSB side)
15.4 Functional Description of RTD
15.4.1 Outline of RTD Operation
Operation of the RTD is specified by a command entered from devices external to the chip. A command is
indicated by bits 16–19 (Note 1) of the RTD received data.
Table 15.4.1 RTD Commands
RTD Received Data
Command
b19
b18
b17
b16
Mnemonic
RTD Function
0000
VER (VERify)
Continuous monitor
0100
0101
0110
VEI (VErify Interrupt request)
RTD interrupt request
0010
RDR (ReaD RAM)
Real-time RAM content output
0011
WRR (WRite RAM)
RAM content forcible rewrite (with verify)
1111
RCV (ReCoVer)
Recover from runaway condition (Note 2), (Note 3)
0001
System reserved (use inhibited)
↑ (Note 1)
Note 1: The RTD received data bit 19 actually is not stored in the command register, and except for the RCV
command, handled as a “Don’t care” bit. (Bits 16–18 are effective for the command specified.)
Note 2: The RCV command must always be transmitted twice in succession.
Note 3: For the RCV command, all bits, not just 16–19, (i.e., bits 0–15 and bits 20–31) must be set to "1."
15.4.2 Operation of RDR (Real-time RAM Content Output)
When the RDR (real-time RAM content output) command is issued, the RTD is enabled to transfer the
contents of the internal RAM to external devices without causing the CPU’s internal bus to stop. Be-
cause the RTD reads data from the internal RAM while there are no transfers performed between the
CPU and internal RAM, no extra CPU load is incurred.
Only the 32-bit word-aligned addresses(The lower address B’00) can be specified for read from the
internal RAM. (The two low-order address bits specified by a command are ignored.) Data are read out
and transferred from the internal RAM in 32-bit units.
15.4 Functional Description of RTD



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