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HD64F7047 Datasheet(PDF) 181 Page - Renesas Technology Corp

Part # HD64F7047
Description  Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series
PDF  764 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F7047 Datasheet(HTML) 181 Page - Renesas Technology Corp

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Rev. 2.00, 09/04, page 141 of 720
9.6
Accessing External Space
A strobe signal is output in external space accesses to provide primarily for SRAM or ROM direct
connections.
9.6.1
Basic Timing
External access bus cycles are performed in 2 states. Figure 9.3 shows the basic timing of external
space access.
Write
Data
WRL
Data
RD
CS0
Address
CK
Read
T1
T2
Figure 9.3 Basic Timing of External Space Access
During a read, irrespective of operand size, all bits (8 bits in this LSI) in the data bus width for the
access space (address) accessed by
RD signal are fetched by the LSI.
During a write, the
WRL (bits 7 to 0) signal indicates the byte location to be written.



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