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7721 Datasheet(PDF) 213 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 213 Page - Renesas Technology Corp |
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213 / 577 page ![]() SERIAL I/O 7721 Group User’s Manual 11–10 Transmit data is set into the UARTi transmit buffer register. Set the transmit data into the low-order byte of this register when the microcomputer operates in the clock synchronous serial I/O mode or when a 7- bit or 8-bit length of transfer data is selected in the UART mode. When a 9-bit length of transfer data is selected in the UART mode, set the transmit data into the UARTi transmit buffer register as follows: •Bit 8 of the transmit data into bit 0 of high-order byte of this register. •Bits 7 to 0 of the transmit data into the low-order byte of this register. The transmit data which is set in the UARTi transmit buffer register is transferred to the UARTi transmit register when the transmission conditions are satisfied, and then it is output from the TxDi pin synchronously with the transfer clock. The UARTi transmit buffer register becomes empty when the data which is set in the UARTi transmit buffer register is transferred to the UARTi transmit register. Accordingly, the user can set the next transmit data. When quitting the transmission which is in progress and setting the UARTi transmit buffer register again, follow the procedure described bellow: Clear the serial I/O mode select bits (bits 2 to 0 at addresses 3016, 3816) to “0002” (Serial I/O disabled). Set the serial I/O mode select bits again. Set the transmit enable bit (bit 0 at addresses 3516, 3D16) to “1” (transmission enabled) and set transmit data in the UARTi transmit buffer register. 11.2 Block description |
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