7906 datasheet(244/531 Pages) RENESAS

244 / 531 page

SERIAL I/O

7906 Group User’s Manual Rev.2.0

11-3

11.2 Block description

Figure 11.2.1 shows the block diagram of serial I/O. Registers relevant to serial I/O are described below.

11.2 Block description

RxDi

Data bus (odd)

Data bus (even)

UARTi receive register

UARTi receive

buffer register

UARTi transmit

buffer register

Receive

control circuit

Transmit control

circuit

1 / (n+1)

1/16

1/2

BRGi

Clock synchronous

(internal clock selected)

UART

Clock

synchronous

UART

Clock synchronous

(internal clock selected)

Clock synchronous

(external clock selected)

Data bus (odd)

Data bus (even)

TxDi

Transfer clock

BRG count source

select bits

UARTi transmit register

Bit converter

n: Values set in UARTi baud rate register (BRGi)

Clock

synchronous

D7 D6 D5 D4 D3 D2 D1 D0

f16

f64

f512

D7 D6 D5 D4 D3 D2 D1 D0

CTSi/RTSi

CTSi/CLKi

CTSi

CLKi

Fig. 11.2.1 Block diagram of serial I/O

7906 Datasheet(PDF) 244 Page - Renesas Technology Corp

7906 Datasheet(HTML) 244 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL