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7906 Datasheet(PDF) 246 Page - Renesas Technology Corp |
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7906 Datasheet(HTML) 246 Page - Renesas Technology Corp |
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246 / 531 page ![]() SERIAL I/O 7906 Group User’s Manual Rev.2.0 11-5 (1) Serial I/O mode select bits (bits 0 to 2) These bits select a UARTi’s operating mode. (2) Internal/External clock select bit (bit 3) s Clock synchronous serial I/O mode By clearing this bit to “0” in order to select an internal clock, the clock which is selected with the BRG count source select bits (bits 0 and 1 at addresses 3416, 3C16) becomes the count source of the BRGi. (Refer to section “11.2.6 UARTi baud rate register (BRGi).”) The BRGi’s output divided by 2 becomes the transfer clock. Additionally, the transfer clock is output from the CLKi pin. By setting this bit to “1” in order to select an external clock, the clock input to the CLKi pin becomes the transfer clock. s UART mode By clearing this bit to “0” in order to select an internal clock, the clock which is selected with the BRG count source select bits (bits 0 and 1 at addresses 3416, 3C16) becomes the count source of the BRGi. (Refer to section “11.2.6 UARTi baud rate register (BRGi).”) Then, the CLKi pin functions as a programmable I/O port pin. By setting this bit to “1” in order to select an external clock, the clock input to the CLKi pin becomes the count source of BRGi. Always in the UART mode, the BRGi’s output divided by 16 becomes the transfer clock. (3) Stop bit length select bit, Odd/Even parity select bit, Parity enable bit (bits 4 to 6) Refer to section “11.4.2 Transfer data format.” (4) Sleep select bit (bit 7) Refer to section “11.4.8 Sleep mode.” 11.2 Block description |
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