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32170 Datasheet(PDF) 101 Page - Renesas Technology Corp |
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32170 Datasheet(HTML) 101 Page - Renesas Technology Corp |
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101 / 881 page ![]() 4 4-6 32170/32174 Group User's Manual (Rev. 2.1) 4.4 EIT Processing Mechanism The M32R/ECU's EIT processing mechanism consists of the M32R CPU core and the interrupt controller for internal peripheral I/Os. It also has the backup registers for the PC and PSW (BPC register and the BPSW field of the PSW register). The M32R/ECU's internal EIT processing mechanism is shown below. Figure 4.4.1 The M32R/ECU's EIT Processing Mechanism Interrupt controller (ICU) SBI EI Internal peripheral I/O RESET RI AE, RIE, TRAP IE flag (PSW) M32R CPU core SBI Low High Priority SBI EI RI M32R/ECU PSW register PSW BPSW BPC register PC register EIT 4.4 EIT Processing Mechanism |
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