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32170 Datasheet(PDF) 103 Page - Renesas Technology Corp |
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32170 Datasheet(HTML) 103 Page - Renesas Technology Corp |
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103 / 881 page ![]() 4 4-8 32170/32174 Group User's Manual (Rev. 2.1) 4.6 Saving and Restoring the PC and PSW The following describes operation of the M32R at the time when it accepts an EIT and when it executes the "RTE" instruction. (1) Hardware preprocessing when an EIT is accepted (a) Save the SM, IE, and C bits of the PSW register BSM ← SM BIE ← IE BC ← C (b) Update the SM, IE, and C bits of the PSW register SM ← Remains unchanged (RIE, AE, TRAP) or set to 0 (SBI, EI, RI) IE ← Set to 0 C ← Set to 0 (c) Save the PC register BPC ← PC (d) Set the vector address in the PC register Branches to the EIT vector and executes the branch instruction ("BRA" instruction) written in it, thereby transferring control to the user-created EIT handler. (2) Hardware postprocessing when the "RTE" instruction is executed (e) Restore the SM, IE, and C bits of the PSW register from their backup bits. SM ← BSM IE ← BIE C ← BC (f) Restore the value of the PC register from the BPC register PC ← BPC Note: The value of the BPC register and those of the BSM, BIE, and BC bits of the PSW register after execution of the "RTE" instruction are indeterminate. EIT 4.6 Saving and Restoring the PC and PSW |
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