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TSS463B Datasheet(PDF) 38 Page - ATMEL Corporation

Part # TSS463B
Description  VAN Data Link Controller with Serial Interface
PDF  59 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

TSS463B Datasheet(HTML) 38 Page - ATMEL Corporation

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38
TSS463B
4102E–AUTO–12/04
Identifier Tag and Command
Registers
The identifier tag and command registers are located at the base_address and
base_address + 1. It allows the user to specify the full 12-bit identifier field of the ISO
standard and the 4-bit command.
•
Read/Write registers.
ID_T [11:0]: Identifier Tag
Upon a reception hit (i.e, a good comparison between the identifier received and an
identifier specified, taking the comparison mask into account, as well as a status and
command indicating a message to be received), the identifier tag bits value will be
rewritten with the identifier bits actually received.
EXT, RAK, RNW and RTR
(See Section “Message Types”, page 44). No comparison will be done on the command
bits, except on EXT bit. The RAK, RNW and RTR bits will be written into the first byte of
the Message upon a reception hit.
The RNW and RTR bits, as well as the status bits in the length and status register, must
be in a valid position for reception or transmission. If not, the message corresponding to
this identifier is considered as inactive or invalid.
The way of knowing if an acknowledge sequence was requested or not is to check the
first byte of the Message.
Message Pointer Register
The message pointer register at address (base_address + 0x02) is 8 bits wide. It indi-
cates where in the Message DATA RAM area the message buffer is located.
•
Read/Write register.
DRAK: Disable RAK (Used in
‘Spy Mode’)
In reception: whatever is the RAK bit of the incoming valid frame, no ACK answer will be
set. If the message was successfully received, an IT is set (ROK or RNOK).
In transmission: no action.
One: disable active, “spy mode”.
Zero: disable inactive, normal operation.
M_P [6:0]: Message Pointer
Since the Message DATA RAM area base address is 0x80, the value in this register is
the offset from that address. If the message buffer length value is illegal (i.e. zero), this
register is redefined as being a link pointer, thus containing the channel number of the
channel that contains the actual message pointer, message length and received status.
However, the identifier, mask, error and transmitted status used will be that of the origi-
nally matched channel. In any case, if a link is intended, the three high bits of M_P [6:0]
should be set to 0.
This allows several channels to use the same actual reception buffer in Message DATA
RAM, thus diminishing the memory usage.
Note:
Only 1 level of link is supported.
7
654
321
0
ID_T 3
ID_T 2
ID_T 1
ID_T 0
EXT
RAK
RNW
RTR
base_address
+ 0x01
7
654
321
0
ID_T 11
ID_T 10
ID_T 9
ID_T 8
ID_T 7
ID_T 6
ID_T 5
ID_T 4
base_address
+ 0x00
7
654
321
0
DRAK
M_P 6
M_P 5
M_P 4
M_P 3
M_P 2
M_P 1
M_P 0
base_address
+ 0x02



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