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ST7567 Datasheet(PDF) 9 Page - Sitronix Technology Co., Ltd. |
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ST7567 Datasheet(HTML) 9 Page - Sitronix Technology Co., Ltd. |
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9 / 49 page ![]() ST7567 Ver 1.4b 9/49 2009/02/04 Pin Name Type Description No. of Pins ERD I Read/Write execution control pin. When PSB is “H”, C86 MPU Type ERD Description H 6800 series E Read/Write control input pin. R/W=”H“: When E is “H”, D[7:0] are in output mode. R/W=”L“: Signals on D[7:0] are latched at the falling edge of E signal. L 8080 series /RD Read enable input pin. When /RD is “L”, D[7:0] are in output mode. ERD is not used in serial interface and should fix to “H” by VDD1 or VDDH. 1 I/O When using 8-bit parallel interface: (6800 or 8080 mode) 8-bit bi-directional data bus. Connect to the data bus of 8-bit microprocessor. When CSB is non-active (CSB=“H”), D[7:0] pins are high impedance. D[7:0] I When using serial interface: 4-LINE D7=SDA : Serial data input. D6=SCL : Serial clock input. D[5:0] are not used and should connect to “H” by VDD1 or VDDH. When CSB is non-active (CSB=“H”), D[7:0] pins are high impedance. 8 Note: 1. After VDD1 is turned ON, any MPU interface pins cannot be left floating. Configuration Pins Pin Name Type Description No. of Pins VDDH I Logic “1” level for option pins which should connected to “H”. 2 VSSL I Logic “0” level for option pins which should connected to “L”. 2 PSB I PSB selects the interface type: Serial or Parallel. 1 C86 I C86 selects the microprocessor type in parallel interface mode. PSB C86 Selected Interface “H” “H” Parallel 6800 Series MPU Interface “H” “L” Parallel 8080 Series MPU Interface “L” “X” Serial 4-Line SPI Interface Please refer to “APPLICATION NOTES” and “Microprocessor Interface” (Section 6) for detailed connection of the selected interface. 1 SEL[2:1] I These pins select the display duty and bias of ST7567. SEL2 SEL1 Duty Bias “L” “L” 1/65 1/9 or 1/7 “L” “H” 1/49 1/8 or 1/6 “H” “L” 1/33 1/6 or 1/5 “H” “H” 1/55 1/8 or 1/6 Note: 1. The detailed definition of output pin name can be found in Fig 9. 2 |
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