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ST7577 Datasheet(PDF) 34 Page - Sitronix Technology Co., Ltd. |
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ST7577 Datasheet(HTML) 34 Page - Sitronix Technology Co., Ltd. |
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34 / 48 page ![]() ST7577 Ver 1.0a 34/48 2008/02/14 USING RESB Power OFF Flow <Start> (Sleep Out State) Set RESB=L Wait 250ms Power OFF Flow <End> (Sleep Out State) Turn Power OFF (VDD1 & VDD2) Instruction Flow Note: 9. tOFF-RES: Internal Power discharge time. => 250ms (max). 10. tOFF-V2: Period between VDD and VDD2 OFF time. => 50 ms (max). 11. It is NOT recommended to turn VDD OFF before VDD2. Without VDD, the internal status cannot be guaranteed and internal discharge-process maybe stopped. The un-discharged power maybe polarizes the liquid crystal in panel. 12. IC will NOT be damaged if either VDD or VDD2 is OFF while another is ON. 13. The timing is dependent on panel loading and the external capacitor(s). 14. The timing in these figures is base on the condition that: LCD Panel Size = 1.4 ” with C1=1uF. |
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