ST7577 datasheet(14/48 Pages) SITRONIX

14 / 48 page

ST7577

Ver 1.0a

14/48

2008/02/14

Data Transfer

ST7577 uses bus holder and internal data bus for data transfer with the MPU. When writing data from the MPU to on-chip

RAM, data is automatically transferred from the bus holder to the RAM as shown in Figure 4. And when reading data from

on-chip RAM to the MPU, the data for the initial read cycle is stored in the bus holder (dummy read) and the MPU reads this

stored data from bus holder for the next data read cycle as shown in Figure 5. This means that a dummy read cycle must be

inserted between each pair of address sets when a sequence of address sets is executed. Therefore, the data of the

specified address cannot be output with the read display data instruction right after the address sets, but can be output at

the second read of data.

Figure 5

Read Timing

Dumm y

D(N)

D(N+1)

MPU signal

/WR

D0 to D7

Internal signals

/WR

COLUMN ADDRESS

/RD

D(N)

D(N+1)

D(N+2)

D(N)

D(N+1)

D(N+2)

/RD

BUS HOLDER

Figure 4

Write Timing

D(N)

D(N+1)

D(N+2)

D(N+3)

D(N)

D(N+1)

D(N+2)

D(N+3)

N+1

N+2

N+3

MPU signal

/WR

D0 to D7

Internal signals

/WR

BUS HOLDER

COLUMN ADDRESS

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