R261 datasheet(24/28 Pages) ONSEMI

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BelaSigna R261

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Power Management Strategy & Battery Monitoring

BelaSigna R261 has a built−in power management unit

that guarantees valid system operation under any voltage

supply condition to prevent any unexpected audio output as

the result of any supply irregularity. The unit constantly

monitors the power supply and shuts down all functional

units (including all units in the audio path) when the power

supply voltage goes below a level at which point valid

operation can no longer be guaranteed.

The power management unit on BelaSigna R261 includes

power−on−reset (POR) functionality as well as power

supervisory circuitry, as shown in Figure 13. These two

components work together to ensure proper device

operation under all battery conditions.

The POR sequence is designed to ensure proper system

behavior during start−up and proper system configuration

after start−up. At the start of the POR sequence, the audio

output is disabled and all configuration and control registers

are asynchronously reset to their default values.

The power supervisory circuitry monitors the battery

supply voltage (VBAT). This circuit is used to start the

system when VBAT reaches a safe startup voltage, and to

reset the system when it drops below a relevant voltage

threshold. The relevant parameters are shown in Table 15.

Table 15. POWER MANAGEMENT PARAMETERS

Parameters

Voltage Level

VBAT startup (POR_THR_UP)

1.65 V ± 80 mV

VBAT shutdown (POR_THR_DN)

1.6 V ± 50 mV

POR duration (POR_TIME)

5.6 ms

The POR sequence consists of two phases: voltage supply

stabilization and boot ROM initialization. During the voltage

supply stabilization phase, the following steps are performed:

1. The internal regulators are enabled and allowed to

stabilize

2. The internal charge pump is enabled and allowed

to stabilize

3. SYSCLK is connected to all of the system

components (Free−running PLL output)

4. The system runs the ROM application

At step 1, once the supply voltage rises above the startup

voltage (POR_THR) and remains there for a certain time

(POR_TIME), a signal will enable the charge pump.

At step 2, another POR_TIME delay is implemented to

allow the charge pump to stabilize before toggling the POR

signal, and thus enabling the digital core.

If the supply is consistent, the internal system voltage will

then remain at a fixed nominal voltage. If a spike occurs that

causes the voltage to drop below the shutdown internal

system voltage (POR_THR), the system will shut down. If

the voltage rises again above the startup voltage and remains

there for the required time (POR_TIME), a POR sequence

will occur again.

See the electrical characteristics on Table 2 for details on

POR_THR and POR_TIME.

Once the ROM application is running, more system

monitoring is performed by the application; typically, the

software will permanently monitor the presence of an external

clock, and take the appropriate actions whenever it disappears.

See the system monitoring section for more information.

Digital Communication Interfaces

Debug Port (UART)

BelaSigna R261 has an RS232−based UART that can be

used to interface the chip from ON Semiconductor’s

communication tools. The debug port cannot be used for

customer applications. BelaSigna R261 can only be

configured using the I2C interface. See the I2C interface

section for information on how communication tools can

interface with BelaSigna R261.

General−Purpose Input Output (GPIO) Ports

BelaSigna R261 has five GPIO ports which are all used

with specific functionalities. The five signals are

SPI_CLK/CONFIG_SEL, SPI_CS/ATT_SEL, SPI_SERO/

ALGO_CTRL, SPI_SERI/SLEEP_CTRL and BOOT_SEL.

The BOOT_SEL pin controls the behavior of the four

other GPIOs, as defined in the Booting Control section.

When not used as an SPI port, these four other pins will act

as GPIOs (ALGO_CTRL and SLEEP_CTRL) or as LSADs

(ATT_SEL and CONFIG_SEL).

When used as GPIOs, all pins have pull−up resistors

(BOOT_SEL, SLEEP_CTRL and ALGO_CTRL). When

used as LSADs (ATT_SEL and CONFIG_SEL), the

pull−ups are disabled. If left floating in LSAD mode, the

pins have a weak pull−down to ground.

See the Booting Control, Sleep Mode Control and

Algorithm Control sections earlier in this document for

details on the behavior of these GPIO ports.

I2C Interface

The I2C interface is an industry−standard interface that

can be used for high−speed transmission of data between

BelaSigna R261 and an external device. The interface

operates at speeds up to 400 kbit/sec. In product

development mode, the I2C interface is used for application

debugging purposes, communicating with the BelaSigna

R261 development tools, also known as SignaKlara

Development Utility (SKDU). The interface always

operates in slave mode and the slave address is 0x61.

A comprehensive command interface can be used with

SKDU. It will offer a variety of support functions grouped

in different categories like general system control (system

reset, status information), application control (switching

between operating modes, enabling or disabling the

algorithm), hardware setup (for custom configuration of the

various hardware units like clocking, input/output stages),

algorithm setup (amplitude management, custom algorithm

mode loading) and finally the low−level I2C protocol is also

supported. More details on this command interface can be

found in the “BelaSigna R261 Configuration and

Communications Guide”.

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