BelaSigna R261

http://onsemi.com

3

3.3 V supply voltage (unless noted differently). Parameters marked as screened are tested on each chip. Other parameters are qualified

for all process corners but not tested on every part.)

Parameter

Screened

Unit

Max

Typ

Min

Test Conditions / Notes

Symbol

VMIC

Load Regulation

VMIC_LdReg VMIC = VREG

40

mV/mA

VMIC_LdReg VMIC = VDDA

146

mV/mA

Maximum Load Current

VMIC_ILoad

VMIC = VREG

2

mA

VMIC = VDDA

1

mA

POWER ON RESET

POR Threshold

POR_THR_UP Active on VBAT

1.55

1.65

1.71

V

POR_THR_DN Active on VBAT

1.55

1.6

1.65

V

POR Duration

POR_TIME

3.9

5.8

11.6

ms

INPUT STAGE

Sampling frequency

SF

Defined by ROM−based

application.

16

kHz

Analog input voltage

Vin_AI1_3

No preamp gain on AI1

and AI3

0

2

Vpp

Vin_MIC0_2

30 dB preamp gain by default

on MIC0 and MIC2

0

63.25

mVpp

Preamplifier gain tolerance

Vin_Amp_Toll 1 kHz

−2

2

dB

Input impedance

Vin_Rin

0 dB preamplifier gain,

MCLK = 1.28 MHz

220

254

kW

All other gain settings

510

585

kW

Line−Out

5.2

5.35

kW

Input offset voltage

Vin_Offset

0 dB preamp gain

7

mV

Vin_Offset

All other gains

0.6

mV

Channel cross coupling

Vin_Coupling Any 2 channels

−84

−60

dB

Analog Filter cut−off frequency

AnaIF_FC1

LPF enabled

10

20

30

kHz

AnaIF_FC2

LPF disabled

50

kHz

Analog Filter passband flatness

AnaIF_PB_F

−1

1

dB

Analog filter stopband

attenuation

AnaIF_SB_A

60

dB

Digital Filter cut−off frequency

DigIF_FC

8

kHz

Digital Filter cut−off stopband

attenuation

DigIF_SB_A

80

dB

Total Harmonic Distortion +

Noise (Peak value)

AI_THDN

30 dB preamplifier gain

VBAT = 3.3 V

−64

−68

dB

Dynamic Range

AI_DR

30 dB preamplifier gain

VBAT = 3.3 V

−77

−78

dB

Equivalent Input Noise

EIN

30 dB preamplifier gain

VBAT = 3.3 V

3.25

mV

DIGITAL MICROPHONE OUTPUT

DMIC input clock frequency

DMIC_CLK1

With presets 0 or 5 selected

on CONFIG_SEL

2.048

MHz

DMIC_CLK2

With preset 1 selected on

CONFIG_SEL

2.4

MHz