DP83620 datasheet(73/105 Pages) TI

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DP83620

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SNLS339C – JANUARY 2011 – REVISED APRIL 2013

10.1.5 Auto-Negotiation Advertisement Register (ANAR)

This register contains the advertised abilities of this device as they will be transmitted to its link partner

during Auto-Negotiation. Any writes to this register prior to completion of Auto-Negotiation (as indicated in

the Basic Mode Status Register (address 01h) Auto-Negotiation Complete bit, BMSR[5]) should be

followed by a renegotiation. This will ensure that the new values are properly used in the Auto-Negotiation.

Table 10-7. Auto-Negotiation Advertisement Register (ANAR), address 0x04

Bit

Bit Name

Default

Description

0, RW

Next Page Indication:

0 = Next Page Transfer not desired.

1 = Next Page Transfer desired.

RESERVED

0, RO/P

RESERVED by IEEE: Writes ignored, Read as 0.

0, RW

Remote Fault:

1 = Advertises that this device has detected a Remote Fault.

0 = No Remote Fault detected.

RESERVED

0, RW

RESERVED for Future IEEE use: Write as 0, Read as 0

ASM_DIR

0, RW

Asymmetric PAUSE Support for Full Duplex Links:

The ASM_DIR bit indicates that asymmetric PAUSE is supported.

Encoding and resolution of PAUSE bits is defined in IEEE 802.3 Annex 28B, Tables

28B-2 and 28B-3, respectively. Pause resolution status is reported in PHYCR[13:12].

1 = Advertise that the DTE (MAC) has implemented both the optional MAC control

sublayer and the pause function as specified in clause 31 and annex 31B of 802.3u.

0 = No MAC based full duplex flow control.

PAUSE

0, RW

PAUSE Support for Full Duplex Links:

The PAUSE bit indicates that the device is capable of providing the symmetric PAUSE

functions as defined in Annex 31B.

Encoding and resolution of PAUSE bits is defined in IEEE 802.3 Annex 28B, Tables

28B-2 and 28B-3, respectively. Pause resolution status is reported in PHYCR[13:12].

1 = Advertise that the DTE (MAC) has implemented both the optional MAC control

sublayer and the pause function as specified in clause 31 and annex 31B of 802.3u.

0 = No MAC based full duplex flow control.

0, RO/P

100BASE-T4 Support:

1 = 100BASE-T4 is supported by the local device.

0 = 100BASE-T4 not supported.

TX_FD

Strap, RW

100BASE-TX Full Duplex Support:

1 = 100BASE-TX Full Duplex is supported by the local device.

0 = 100BASE-TX Full Duplex not supported.

Strap, RW

100BASE-TX Support:

1 = 100BASE-TX is supported by the local device.

0 = 100BASE-TX not supported.

10_FD

Strap, RW

10BASE-T Full Duplex Support:

1 = 10BASE-T Full Duplex is supported by the local device.

0 = 10BASE-T Full Duplex not supported.

Strap, RW

10BASE-T Support:

1 = 10BASE-T is supported by the local device.

0 = 10BASE-T not supported.

4:0

SELECTOR

0 0001, RW

Protocol Selection Bits:

These bits contain the binary encoded protocol selector supported by this port. <00001>

indicates that this device supports IEEE 802.3u.

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