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DP83620 Datasheet(PDF) 22 Page - Texas Instruments

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Part # DP83620
Description  Deterministic, Low Transmit and Receive Latency, Selectable Frequency Synchronized Clock Output, Dynamic Link Quality Monitoring
PDF  105 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DP83620 Datasheet(HTML) 22 Page - Texas Instruments

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TX_EN
TX_CLK
COL
T2.17.2
T2.17.1
T2.16.1
IDLE
1
0
1
PMD Input
Pair
RX_CLK
CRS/CRS_DV
Data
SFD
Preamble
0000
T2.15.3
T2.15.2
T2.15.1
1
0
1
0
1
0
1
0
1
0
1
1
PMD
Input Pair
CRS/CRS_DV
RX_DV
RXD[3:0]
1st SFD bit decoded
DP83620
SNLS339C – JANUARY 2011 – REVISED APRIL 2013
www.ti.com
4.19 AC Specifications — 10BASE-T MII Receive Timing (Start of Packet)
Parameter
Description
Notes
Min
Typ
Max
Units
T2.15.1
Carrier Sense Turn On Delay (PMD
630
1000
ns
Input Pair to CRS)
T2.15.2
RX_DV Latency(1)(2)
10
bits
T2.15.3
Receive Data Latency
Measurement shown from SFD
8
bits
(1)
10BASE-T RX_DV Latency is measured from first bit of preamble on the wire to the assertion of RX_DV
(2)
1 bit time = 100 ns in 10 Mb/s mode.
4.20 AC Specifications — 10BASE-T MII Receive Timing (End of Packet)
Parameter
Description
Notes
Min
Typ
Max
Units
T2.16.1
Carrier Sense Turn Off Delay
1.0
µs
4.21 AC Specifications — 10 Mb/s Heartbeat Timing
Parameter
Description
Notes
Min
Typ
Max
Units
T2.17.1
CD Heartbeat Delay
All 10 Mb/s modes
1200
ns
T2.17.2
CD Heartbeat Duration
All 10 Mb/s modes
1000
ns
22
Electrical Specifications
Copyright © 2011–2013, Texas Instruments Incorporated
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