H1102 datasheet(14/54 Pages) MICREL

14 / 54 page

Micrel, Inc.

KSZ8041NL/RNL

September 2010

M9999-090910-1.4

Strapping Options – KSZ8041NL

Pin Number

Pin Name

Type

(1)

Pin Function

PHYAD2

PHYAD1

PHYAD0

Ipd/O

Ipu/O

The PHY Address is latched at power-up / reset and is configurable to any value from

1 to 7.

The default PHY Address is 00001.

PHY Address bits [4:3] are always set to ‘00’.

CONFIG2

CONFIG1

CONFIG0

Ipd/O

The CONFIG[2:0] strap-in pins are latched at power-up / reset and are defined as

follows:

CONFIG[2:0]

Mode

000

MII (default)

001

RMII

010

Reserved – not used

011

Reserved – not used

100

MII 100Mbps Preamble Restore

101

Reserved – not used

110

Reserved – not used

111

Reserved – not used

ISO

Ipd/O

ISOLATE mode

Pull-up = Enable

Pull-down (default) = Disable

During power-up / reset, this pin value is latched into register 0h bit 10.

SPEED

Ipu/O

SPEED mode

Pull-up (default) = 100Mbps

Pull-down = 10Mbps

During power-up / reset, this pin value is latched into register 0h bit 13 as the Speed

Select, and also is latched into register 4h (Auto-Negotiation Advertisement) as the

Speed capability support.

DUPLEX

Ipu/O

DUPLEX mode

Pull-up (default) = Half Duplex

Pull-down = Full Duplex

During power-up / reset, this pin value is latched into register 0h bit 8 as the Duplex

Mode.

NWAYEN

Ipu/O

Nway Auto-Negotiation Enable

Pull-up (default) = Enable Auto-Negotiation

Pull-down = Disable Auto-Negotiation

During power-up / reset, this pin value is latched into register 0h bit 12.

Note:

Ipu/O = Input with internal pull-up (40K +/-30%) during power-up/reset; output pin otherwise.

Ipd/O = Input with internal pull-down (40K +/-30%) during power-up/reset; output pin otherwise.

Pin strap-ins are latched during power-up or reset. In some systems, the MAC receive input pins may drive high during

power-up or reset, and consequently cause the PHY strap-in pins on the MII/RMII signals to be latched high. In this

case, it is recommended to add 1K pull-downs on these PHY strap-in pins to ensure the PHY does not strap-in to

ISOLATE mode, or is not configured with an incorrect PHY Address.

H1102 Datasheet(PDF) 14 Page - Micrel Semiconductor

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