H1102 datasheet(16/54 Pages) MICREL

16 / 54 page

Micrel, Inc.

KSZ8041NL/RNL

September 2010

M9999-090910-1.4

Pin Description – KSZ8041RNL

Pin Number

Pin Name

Type

(1)

Pin Function

GND

Gnd

Ground

VDDPLL_1.8

1.8V analog VDD

VDDA_3.3

3.3V analog VDD

RX-

I/O

Physical receive or transmit signal (- differential)

RX+

I/O

Physical receive or transmit signal (+ differential)

TX-

I/O

Physical transmit or receive signal (- differential)

TX+

I/O

Physical transmit or receive signal (+ differential)

Crystal feedback – for 25 MHz crystal

This pin is a no connect if oscillator or external clock source is used.

Crystal / Oscillator / External Clock Input

25MHz +/-50ppm

REXT

I/O

Set physical transmit output current

Connect a 6.49K

Ω resistor in parallel with a 100pF capacitor to ground on this

pin. See KSZ8041RNL reference schematics.

MDIO

I/O

Management Interface (MII) Data I/O

This pin requires an external 4.7K

Ω pull-up resistor.

MDC

Management Interface (MII) Clock Input

This pin is synchronous to the MDIO data interface.

PHYAD0

Ipu/O

The pull-up/pull-down value is latched as PHYADDR[0] during power-up / reset.

See “Strapping Options” section for details.

PHYAD1

Ipd/O

The pull-up/pull-down value is latched as PHYADDR[1] during power-up / reset.

See “Strapping Options” section for details.

RXD1 /

PHYAD2

Ipd/O

RMII Mode:

RMII Receive Data Output[1]

(2)

Config Mode:

The pull-up/pull-down value is latched as PHYADDR[2] during

power-up / reset. See “Strapping Options” section for details.

RXD0 /

DUPLEX

Ipu/O

RMII Mode:

RMII Receive Data Output[0]

(2)

Config Mode:

Latched as DUPLEX (register 0h, bit 8) during power-up /

reset. See “Strapping Options” section for details.

VDDIO_3.3

3.3V digital VDD

CRS_DV /

CONFIG2

Ipd/O

RMII Mode:

Carrier Sense/Receive Data Valid Output /

Config Mode:

The pull-up/pull-down value is latched as CONFIG2 during

power-up / reset. See “Strapping Options” section for details.

REF_CLK

50MHz Clock Output

This pin provides the 50MHz RMII reference clock output to the MAC.

RX_ER /

ISO

Ipd/O

RMII Mode:

RMII Receive Error Output /

Config Mode:

The pull-up/pull-down value is latched as ISOLATE during

power-up / reset. See “Strapping Options” section for details.

INTRP

Opu

Interrupt Output: Programmable Interrupt Output

interrupt conditions and reading the interrupt status. Register 1Fh bit 9 sets the

interrupt output to active low (default) or active high.

No connect

TX_EN

RMII Transmit Enable Input

H1102 Datasheet(PDF) 16 Page - Micrel Semiconductor

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