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H1102 Datasheet(PDF) 39 Page - Micrel Semiconductor

Part # H1102
Description  10Base-T/100Base-TX Physical Layer Transceiver
PDF  54 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

H1102 Datasheet(HTML) 39 Page - Micrel Semiconductor

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Micrel, Inc.
KSZ8041NL/RNL
September 2010
39
M9999-090910-1.4
Register Description (Continued)
Address
Name
Description
Mode
(1)
Default
1f.10
Power Saving
1 = Enable power saving
0 = Disable power saving
If power saving mode is enabled and the cable
is disconnected, the RXC clock output (in MII
mode) is disabled. RXC clock is enabled after
the cable is connected and link is established.
RW
0
1f.9
Interrupt Level
1 = Interrupt pin active high
0 = Interrupt pin active low
RW
0
1f.8
Enable Jabber
1 = Enable jabber counter
0 = Disable jabber counter
RW
1
1f.7
Auto-
Negotiation
Complete
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
RW
0
1f.6
Enable Pause
(Flow Control)
1 = Flow control capable
0 = No flow control capability
RO
0
1f.5
PHY Isolate
1 = PHY in isolate mode
0 = PHY in normal operation
RO
0
1f.4:2
Operation
Mode
Indication
[000] = still in auto-negotiation
[001] = 10Base-T half-duplex
[010] = 100Base-TX half-duplex
[011] = reserved
[101] = 10Base-T full-duplex
[110] = 100Base-TX full-duplex
[111] = reserved
RO
000
1f.1
Enable SQE
test
1 = Enable SQE test
0 = Disable SQE test
RW
0
1f.0
Disable Data
Scrambling
1 = Disable scrambler
0 = Enable scrambler
RW
0
Note:
1.
RW = Read/Write.
RO = Read only.
SC = Self-cleared.
LH = Latch high.
LL = Latch low.



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