Electronic Components Datasheet Search
  English  ▼

X  

AD9863 Datasheet(PDF) 8 Page - Analog Devices

Part # AD9863
Description  Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications
PDF  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9863 Datasheet(HTML) 8 Page - Analog Devices

Back Button AD9863 Datasheet HTML 4Page - Analog Devices AD9863 Datasheet HTML 5Page - Analog Devices AD9863 Datasheet HTML 6Page - Analog Devices AD9863 Datasheet HTML 7Page - Analog Devices AD9863 Datasheet HTML 8Page - Analog Devices AD9863 Datasheet HTML 9Page - Analog Devices AD9863 Datasheet HTML 10Page - Analog Devices AD9863 Datasheet HTML 11Page - Analog Devices AD9863 Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 40 page
background image
AD9863
Rev. A| Page 8 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
SPI_DIO
1
SPI_CLK
2
SPI_SDO
3
ADC_LO_PWR
4
DVDD
5
DVSS
6
AVDD 7
IOUT–A
8
IOUT+A
9
AGND 10
REFIO 11
FSADJ 12
AGND 13
IOUT+B 14
IOUT–B 15
AVDD 16
CLKIN1
48
CLKIN2
47
RESET
46
L0
45
L1
44
L2
43
L3
42
L4
41
L5
40
L6
39
L7
38
L8
37
L9
36
L10
35
L11
34
IFACE1
33
AD9863
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Name1
Description2, 3
1
SPI_DIO
(Interp1)
SPI: Serial Port Data Input.
No SPI: Tx Interpolation Pin, MSB.
2
SPI_CLK
(Interp0)
SPI: Serial Port Shift Clock.
No SPI: Tx Interpolation Pin, LSB.
3
SPI_SDO
(FD/HD)
SPI: 4-Wire Serial Port Data Output.
No SPI: Configures Full-Duplex or Half-Duplex Mode.
4
ADC_LO_PWR
ADC Low Power Mode Enable. Defined at power-up.
5, 31
DVDD, DRVDD
Digital Supply.
6, 32
DVSS, DRVDD
Digital Ground.
7, 16, 50, 51, 61
AVDD
Analog Supply.
8, 9
IOUT
−A, IOUT+A
DAC A Differential Output.
10, 13, 49, 53, 59
AGND, AVSS
Analog Ground.
11
REFIO
Tx DAC Band Gap Reference Decoupling Pin.
12
FSADJ
Tx DAC Full-Scale Adjust Pin.
14, 15
IOUT+B, IOUT−B
DAC B Differential Output.
SPI: Buffered CLKIN. Can be configured as system clock output.
17
IFACE2
(12/24)
No SPI: Buffered CLKIN for FD; 12/24 configuration pin for HD24 or HD12.
18
IFACE3
Clock Output.
19 to 30
U11 to U0
Upper Data Bit 11 to Upper Data Bit 0.
SPI: TxSYNC for FD; Tx/Rx for HD24, HD12, or clone.
33
IFACE1
No SPI: FD >> TxSYNC; HD24 or HD12: Tx/Rx. Clone mode requires a serial port
interface.
34 to 45
L11 to L0
Lower Data Bit 11 to Lower Data Bit 0.
46
RESET
Chip Reset When Low.
47
CLKIN2
Clock Input 2.
48
CLKIN1
Clock Input 1.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com