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AM79C976 Datasheet(PDF) 248 Page - Advanced Micro Devices |
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AM79C976 Datasheet(HTML) 248 Page - Advanced Micro Devices |
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248 / 309 page ![]() 248 Am79C976 8/01/00 P R E L I M INARY Control and Status Registers RAP Addr Symbol Default Value Comments Use 00 CSR0 uuuu 0004 Am79C976 Controller Status and Control Register R 01 CSR1 uuuu uuuu Lower IADR: maps to location 16 S 02 CSR2 uuuu uuuu Upper IADR: maps to location 17 S 03 CSR3 uuuu 0600 Interrupt Masks and Deferral Control S 04 CSR4 uuuu 0004 Test and Features Control R 05 CSR5 uuuu 0000 Extended Control and Interrupt 1 R 06 CSR6 uuuu uuuu Reserved 07 CSR7 0uuu 0000 Extended Control and Interrupt 2 R 08 CSR8 uuuu uuuu LADRF0: Logical Address Filter — LADRF[15:0] S 09 CSR9 uuuu uuuu LADRF1: Logical Address Filter — LADRF[31:16] S 10 CSR10 uuuu uuuu LADRF2: Logical Address Filter — LADRF[47:32] S 11 CSR11 uuuu uuuu LADRF3: Logical Address Filter — LADRF[63:48] S 12 CSR12 uuuu uuuu PADR0: Physical Address Register — PADR[15:0] S 13 CSR13 uuuu uuuu PADR1: Physical Address Register — PADR[31:16] S 14 CSR14 uuuu uuuu PADR2: Physical Address Register — PADR[47:32] S 15 CSR15 see register description MODE: Mode Register S 16 CSR16 uuuu uuuu Reserved 17 CSR17 uuuu uuuu Reserved 18 CSR18 uuuu uuuu Reserved 19 CSR19 uuuu uuuu Reserved 20 CSR20 uuuu uuuu Reserved 21 CSR21 uuuu uuuu Reserved 22 CSR22 uuuu uuuu Reserved 23 CSR23 uuuu uuuu Reserved 24 CSR24 uuuu uuuu BADRL: Base Address of RCV Ring Lower S 25 CSR25 uuuu uuuu BADRU: Base Address of RCV Ring Upper S 26 CSR26 uuuu uuuu Reserved 27 CSR27 uuuu uuuu Reserved 28 CSR28 uuuu uuuu Reserved 29 CSR29 uuuu uuuu Reserved 30 CSR30 uuuu uuuu BADXL: Base Address of XMT Ring Lower S 31 CSR31 uuuu uuuu BADXU: Base Address of XMT Ring Upper S 32 CSR32 uuuu uuuu Reserved 33 CSR33 uuuu uuuu Reserved |
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