AM79C976 datasheet(32/309 Pages) AMD

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Am79C976

8/01/00

P R E L I M INARY

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System Bus Interface

The Am79C976 controller is designed to operate as a

bus master during normal operations. Some slave I/O

accesses to the Am79C976 controller are required in

nor mal operations as well. Initialization of the

Am79C976 controller is achieved through a combina-

tion of PCI Configuration Space accesses, bus slave

accesses, bus master accesses, and an optional read

of a ser ial EEPROM that is pe rfor med by the

Am79C976 controller. The EEPROM read operation is

performed through the 93Cxx EEPROM interface. The

ISO 8802-3 (IEEE/ANSI 802.3) Ethernet Address may

reside within the serial EEPROM. Some Am79C976

controller configuration registers may also be pro-

grammed by the EEPROM read operation.

The Am79C976 controller requires 4 Kbytes of memory

address space for access to all the various internal reg-

isters as well as access to some setup information

stored in an external serial EEPROM. For compatibility

with previous PCnet family devices, the lower 32 bytes

of the register space are also mapped into I/O space,

but some functions of the Am79C976 controller (such

as network statistics) are only available in memory

space. The location of the memory or I/O address

space claimed by this device is programmed through

the base address registers in PCI configuration space.

For diskless stations, the Am79C976 controller sup-

ports a ROM or Flash-based (both referred to as the

Expansion ROM throughout this specification) boot de-

vice of up to 16 Mbyte in size. The host can map the

boot device to any memory address that aligns to a de-

vice size boundary by modifying the Expansion ROM

Base Address register in the PCI configuration space.

The Expansion ROM device size is determined by the

value set in the ROM-CFG register.

Software Interface

The software interface to the Am79C976 controller is

divided into three parts. One part is the PCI configura-

tion registers used to identify the Am79C976 controller

and to setup the configuration of the device. The setup

information includes the I/O or memory mapped I/O

base address, mapping of the Expansion ROM, and

the routing of the Am79C976 controller interrupt chan-

nel. This allows for a jumperless implementation.

The second portion of the software interface is the

direct access to the I/O resources of the Am79C976

controller. The Am79C976 controller requires 4 Kbytes

of memory address space for access to all the various

internal registers as well as access to some setup infor-

mation stored in an external serial EEPROM. For com-

patibility with previous PCnet family devices, the lower

32 bytes of the register space are also mapped into I/O

space, but some functions of the Am79C976 controller

(such as network statistics) are only available in mem-

ory space.

The third portion of the software interface is the de-

scriptor and buffer areas that are shared between the

software and the Am79C976 controller during normal

network operations. The descriptor area boundaries

are set by the software and do not change during nor-

mal network operations. There is one descriptor area

for receive activity and there is a separate area for

transmit activity. The descriptor space contains relocat-

able pointers to the network frame data, and it is used

to transfer frame status from the Am79C976 controller

to the software. The buffer areas are locations that hold

frame data for transmission or that accept frame data

that has been received.

Network Interface

The Am79C976 controller can be connected to an

IEEE 802.3 or proprietary network through the IEEE

802.3-compliant Media Independent Interface (MII).

The MII is a nibble-wide interface to an external

100-Mbps and/or 10-Mbps transceiver device.

The Am79C976 controller supports both half-duplex

and full-duplex operation on the network interface.

AM79C976 Datasheet(PDF) 32 Page - Advanced Micro Devices

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