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AM79C976 Datasheet(PDF) 54 Page - Advanced Micro Devices

Part # AM79C976
Description  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 Datasheet(HTML) 54 Page - Advanced Micro Devices

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54
Am79C976
8/01/00
P R E L I M INARY
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Table 4 shows the descriptor read sequence. During
descriptor write accesses, only the byte lanes which
need to be written are enabled.
The settings of SWSTYLE (BCR20, bits 7-0) affect the
way the Am79C976 controller performs descriptor write
operations.
When SWSTYLE is set to 0 or 2, all descriptor write op-
erations are performed in non-burst mode.
When SWSTYLE is set to 3, 4, or 5, the descriptor en-
tr ies are ordered to allow burst transfers. The
Am79C976 controller will perform all descriptor write
operations in burst mode. See Table 5 for the descriptor
write sequence.
Table 4. Descriptor Read Sequence
FRAME
CLK
AD
IRDY
TRDY
C/BE
DEVSEL
REQ
GNT
1
234567
MD1
0000
0110
PAR
PAR
PAR
DATA
DATA
PAR
DEVSEL is sampled
22929B25
SWSTYLE
BCR20
[7:0]
AD Bus Sequence
for Rx Descriptors
AD Bus Sequence
for Tx Descriptors
0
Address = XXXX
XX00h
Turn around cycle
Data
Idle
Address = XXXX
XX04h
Turn around cycle
Data
Address = XXXX
XX00h
Turn around cycle
Data
Idle
Address = XXXX
XX04h
Turn around cycle
Data
2
Address = XXXX
XX04h
Turn around cycle
Data
Idle
Address = XXXX
XX00h
Turn around cycle
Data
Address = XXXX
XX04h
Turn around cycle
Data
Idle
Address = XXXX
XX00h
Turn around cycle
Data
3
Address = XXXX
XX04h
Turn around cycle
Data
Data
Address = XXXX
XX04h
Turn around cycle
Data
Data
4
Address = XXXX
XX04h
Turn around cycle
Data
Data
Address = XXXX
XX00h
Turn around cycle
Data
Data
Data
5
Address = XXXX
XX08h
Turn around cycle
Data
Data
Data
Address = XXXX
XX00h
Turn around cycle
Data
Data
Data
Data



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