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AM79C976 Datasheet(PDF) 55 Page - Advanced Micro Devices |
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AM79C976 Datasheet(HTML) 55 Page - Advanced Micro Devices |
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55 / 309 page ![]() 8/01/00 Am79C976 55 P R E L I M INARY Table 5. Descriptor Write Sequence Note: Figure 24 assumes that the Am79C976 control- ler is programmed to use 32-bit software structures (SWSTYLE = 2, 3, 4, or 5). The byte enable signals for the second data transfer would be 0111b, if the device was programmed to use 16-bit software structures (SWSTYLE = 0). SWSTYLE BCR20[7: 0] AD Bus Sequence for Rx Descriptor AD Bus Sequence for Tx Descriptor 0 Address = XXXX XX04h Data Idle Address = XXXX XX00h Data Address = XXXX XX04h Data Idle Address = XXXX XX00h Data 2 Address = XXXX XX08h Data Idle Address = XXXX XX04h Data Address = XXXX XX08h Data Idle Address = XXXX XX04h Data 3 Address = XXXX XX00h Data Data Address = XXXX XX00h Data Data 4 Address = XXXX XX00h Data Address = XXXX XX00h Data 5 Address = XXXX XX00h Data Address = XXXX XX00h Data |
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