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AM79C976 Datasheet(PDF) 58 Page - Advanced Micro Devices |
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AM79C976 Datasheet(HTML) 58 Page - Advanced Micro Devices |
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58 / 309 page  58 Am79C976 8/01/00 P R E L I M INARY )LJXUH ),)2 %XUVW :ULWH $W 6WDUW 2I 8QDOLJQHG %XIIHU If a receive buffer does not end on a DWord boundary, the Am79C976 controller will perform a non-DWord write on the last transfer to the buffer. Figure 27 shows the final three FIFO DMA transfers to a receive buffer. Since there were only 9 bytes of space left in the re- ceive buffer, the Am79C976 controller bursts three data phases. The first two data phases write a full DWord, the last one only writes a single byte. FRAME CLK AD IRDY TRDY C/BE DEVSEL REQ GNT 1 23456 0000 0111 PAR PAR PAR DEVSEL is sampled 0001 PAR DATA DATA DATA ADD 22929B28 |
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