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AM79C976 Datasheet(PDF) 263 Page - Advanced Micro Devices

Part # AM79C976
Description  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 Datasheet(HTML) 263 Page - Advanced Micro Devices

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8/01/00
Am79C976
263
P R E L I M INARY
8000--
4000--
2000--
1000--
0800
--
0400
--
0200
--
0100
SSIZE32
0080
SWSTYLE
0040
SWSTYLE
0020
SWSTYLE
0010
SWSTYLE
0008
SWSTYLE
0004
SWSTYLE
0002
SWSTYLE
0001
SWSTYLE
CSR76
RCVRL: RCV Descriptor Ring length
CSR78
XMTRL: XMT Descriptor Ring length
CSR80
FIFO threshold and DMA burst control (DEFAULT = 1400)
8000
Reserved
4000
Reserved
bits [13:12] = RCVFW, Receive FIFO Watermark
0000 Request DMA when 48 bytes are present
1000 Request DMA when 64 bytes are present
2000 Request DMA when 128 bytes are present
3000 Reserved
bits [11:10] = XMTSP, Transmit Start Point
0000 Start transmission after 16 bytes have been written
0400 Start transmission after 64 bytes have been written
0800 Start transmission after 128 bytes have been written
0C00 Start transmission after the full packet has been written
bits [9:8] = XMTFW, Transmit FIFO Watermark
0000 Start DMA when 16 write cycles can be made
0100 Start DMA when 64 write cycles can be made
0200 Start DMA when 128 write cycles can be made
0300 Start DMA when 256 write cycles can be made
bits [7:0] = Reserved
CSR88~89
Chip ID (Contents = v2628003; v = Version Number)
CSR116
OnNow Power Mode Register
8000
--
4000
--
2000
--
1000
--
0800
--
0400
PM_EN_OVR
0200
LCDET
0100
LCMODE
0080
PMAT
0040
EMPPLBA
0020
MPMAT
0010
MPPEN
0008
RWU_DRIVER
0004
RWU_GATE
0002
RWU_POL
0001
RST_POL
CSR122
Advanced Feature Control
8000
--
4000
--
2000
--
1000
--
0800
--
0400
--
0200
--
0100
--
0080
--
0040
--
0020
--
0010
--
0008
--
0004
--
0002
--
0001
RCVALGN
CSR124
BMU Test Register (DEFAULT = 0000)
8000
--
4000
--
2000
--
1000
--
0800
--
0400
--
0200
--
0100
--
0080
--
0040
--
0020
--
0010
--
0008
RPA
0004
--
0002
--
0001
--
CSR125
MAC Enhanced Configuration Control (DEFAULT = 603c
bits [15:8] = IPG, InterPacket Gap (Default=60xx, 96 bit times)
bits [8:0] = IFS1, InterFrame Space Part 1 (Default=xx3c, 60 bit times)
Register
Contents



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