UM0434 datasheet(356/390 Pages) STMICROELECTRONICS

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UM0434

Nexus3 module

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12.7.3

BTM operation

Enabling program trace

Both types of branch trace messaging can be enabled in one of two ways:

●

Setting DC1[TM] to enable program trace

●

Using WT[PTS] to enable program trace on watchpoint hits. e200z3 watchpoints are

configured within the CPU.

Relative addressing

The relative address feature is compliant with the

IEEE-ISTO 5001-2003 standard

recommendations and is designed to reduce the number of bits transmitted for addresses of

indirect branch messages.

The address transmitted is relative to the target address of the instruction that triggered the

previous indirect branch or synchronized message. It is generated by XORing the new

address with the previous address and then using only the results up to the most significant

1 bit in the result. To recreate this address, an XOR of the most significant zero-padded

message address with the previously decoded address gives the current address. For the

example given in

Table 257, assume the previous address (A1) = 0x0003FC01, and the new

address (A2) = 0x0003F365.

Attempted

access to secure

memory

For SOCs that implement security, any attempted branch to secure memory

locations temporarily disables program trace and causes the corresponding BTM

to be lost. The following direct/indirect branch queues a direct/indirect branch with

synchronization message. The count value within this message will be inaccurate

since the re-enable of program trace is not necessarily aligned on an instruction

boundary.

Collision priority

All messages have the following priority: WPM

→ OTM → BTM → DTM. A BTM

message that attempts to enter the queue at the same time as a watchpoint

message or ownership trace message is lost. An error message is sent indicating

the BTM was lost. The following direct/indirect branch queues a direct/indirect

branch with synchronization message. The count value within this message

reflects the number of sequential instructions executed after the last successful

BTM message was generated. This count includes the branch that did not

generate a message due to the collision.

Execution mode

switch

Whenever the CPU switches execution mode into or out of a sequence of VLE

instructions, the next branch trace message will be a Direct/Indirect Branch w/

Sync Message.

Table 256.

Program trace exception summary (continued)

Exception

condition

Exception handling

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