UPD784021 datasheet(46/90 Pages) NEC

46 / 90 page

mPD784020, 784021

9.3

CONTEXT SWITCHING

When an interrupt request is generated, or when the BRKCS instruction is executed, an appropriate register bank

is selected by the hardware. Then, a branch to a vector address stored in that register bank occurs. At the same

time, the contents of the current program counter (PC) and program status word (PSW) are stacked in the register

bank.

The branch address must be within the range of 0 to FFFFH.

Fig. 9-1 Context Switching Caused by an Interrupt Request

9.4

MACRO SERVICE

The macro service function enables data transfer between memory and special function registers (SFRs) without

requiring the intervention of the CPU. The macro service controller accesses both memory and SFRs within the same

transfer cycle to directly transfer data without having to perform data fetch.

Since the CPU status is neither saved nor restored, nor is data fetch performed, high-speed data transfer is

possible.

Fig. 9-2 Macro Service

PSW

PC19-16

0000B

PC15-0

Exchange

Save

Transfer

(Bits 8 to 11 of

temporary register)

Temporary register

Switching between register banks

(RBS0-RBS2

← n)

RSS

← 0

CPU

SFR

Memory

Read

Write

Read

Write

Macro service

controller

Internal bus

UPD784021 Datasheet(PDF) 46 Page - NEC

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