UPD784021 datasheet(53/90 Pages) NEC

53 / 90 page

mPD784020, 784021

12. RESET FUNCTION

Applying a low-level signal to the RESET pin initializes the internal hardware (reset status).

When the RESET input makes a low-to-high transition, the following data is loaded into the program counter (PC):

• Eight low-order bits of the PC

: Contents of location at address 0000H

• Intermediate eight bits of the PC : Contents of location at address 0001H

• Four high-order bits of the PC

: 0

The PC contents are used as a branch destination address. Program execution starts from that address. Therefore,

a reset start can be performed from an arbitrary address.

The contents of each register can be set by software, as required.

The RESET input circuit contains a noise eliminator to prevent malfunctions caused by noise. This noise eliminator

is an analog delay sampling circuit.

Fig. 12-1 Accepting a Reset

For power-on reset, the RESET signal must be held active until the oscillation settling time (approximately 40 ms)

has elapsed.

Fig. 12-2 Power-On Reset

RESET

(input)

Delay

Initialize PC

Execute instruction

at reset start address

Internal reset signal

Start reset

End reset

Oscillation settling time

Delay

Initialize PC

Execute instruction at

reset start address

RESET

(input)

Internal reset signal

End reset

VDD

UPD784021 Datasheet(PDF) 53 Page - NEC