UPD784021 datasheet(72/90 Pages) NEC

72 / 90 page

mPD784020, 784021

DATA RETENTION CHARACTERISTICS (TA = –40 to +85 °C)

Notes 1. When the input voltage for the pins described in Note 2 satisfies the VIL and VIH conditions in the above

table

2. Pins RESET, P20/NMI, P21/INTP0, P22/INTP1, P23/INTP2/CI, P24/INTP3, P25/INTP4/ASCK/SCK1,

P26/INTP5, P27/SI0, P32/SCK0, and P33/SO0/SB0

AC Timing Test Points

Parameter

Data retention voltage

Data retention current

VDD rising time

VDD falling time

VDD retention time

(referred to STOP mode setting)

STOP release signal input time

Oscillation settling time

Low-level input voltage

High-level input voltage

Symbol

VDDDR

IDDDR

tRVD

tFVD

tHVD

tDREL

tWAIT

VIL

VIH

Unit

Min.

2.5

200

0.9VDDDR

Typ.

Max.

5.5

0.1VDDDR

VDDDR

Conditions

STOP mode

VDDDR = 2.5 to 5.5 VNote 1

VDDDR = 2.5 VNote 1

Crystal

Ceramic resonator

Specified pinsNote 2

VDD – 1 V

0.45 V

0.8VDD or 2.2 V

0.8 V

Test points

0.8VDD or 2.2 V

0.8 V

UPD784021 Datasheet(PDF) 72 Page - NEC

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