TAS5548DCAR datasheet(30/116 Pages) TI1

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Biquads

Series

Bass

and

Treble

Loudness

DRC

Input

Mixer

1 Other

Channel Output

Available For 7 & 8

32-Bit

Trunc

PWM

Proc

A_to_ipmix

B_to_ipmix

SDIN1

C_to_ipmix

D_to_ipmix

SDIN2

Left

Right

Channel V o l u m e

Bass and Treble

Bypass

Bass

and

Treble

Inline

Pre-

Vo l u m e

Post-

Vo l u m e

Output

Gain

Output Mixer Sums

Any Two Channels

PWM

Output

Left

Right

DRC

Bypass

DRC

Inline

E_to_ipmix

F_to_ipmix

SDIN3

G_to_ipmix

H_to_ipmix

SDIN4

Left

Right

Left

Right

B0016

Master

Volume

Max

Volume

IP Mixer 1

(I2C 0x41)

6 X 4

Crossbar

Input Mixer

SDIN1-L (L) (1)

SDIN1-R (R)

SDIN3-L (C)

SDIN3-R (LFE)

MIC-L-IN

MIC-R-IN

IP Mixer 2

(I2C 0x42)

6 X 4

Crossbar

Input Mixer

SDIN1-L (L)

SDIN1-R ( R) (1)

SDIN3-L (C)

SDIN3-R (LFE)

MIC-L-IN

MIC-R-IN

IP Mixer 7

(I2C 0x47)

6 X 4

Crossbar

Input Mixer

SDIN1-L (L)

SDIN1-R (R)

SDIN3-L (C) (1)

SDIN3-R (LFE)

MIC-L-IN

MIC-R-IN

IP Mixer 8

(I2C 0x48)

6 X 4

Crossbar

Input Mixer

SDIN1-L (L)

SDIN1-R (R)

SDIN3-L (C)

SDIN3-R (LFE) (1)

MIC-L-IN

MIC-R-IN

2 DAP 8

(0x82 -

0x83

2 DAP 7

(0x7B-

0x7C

Coeff=0 (lin), (I2C 0x4F )

Coeff=0 (lin),

(I2C 0x4C)

Coeff=1 (lin),

(I2C 0x50 )

Coeff=1 (lin),

(I2C 0x4D)

Coeff=0 (lin), (I2C 0x4B )

Coeff=0 (lin), (I2C 0x4E )

Coeff=0 (lin), (I2C 0x4A )

Coeff=0 (lin), (I2C 0x49 )

5 DAP 1

(0x51 -

0x55

5 DAP 2

(0x58 -

0x5C

4 DAP 8

(0x84 -

0x87

Bass

Treble 1

(0x89-

0x90)

Bass

Treble 2

(0x89-

0x90)

Bass

(0x89-

0x90)

Volume

(0xD1-

0xD8)

Volume

(0xD1-

0xD8)

Loudnes

s 1

(0x91-

0x95)

OP Mixer 1

(I C 0xF4 )

4 × 2 Output

Mixer

Volume

(0xD1-

0xD8)

Volume

(0xD1-

0xD8)

Loudnes

s 2

(0x91-

0x95)

Loudnes

s 8

(0x91-

0x95)

DRC

(0x98-

0x9C)

DRC

(0x98-

0x9C)

DRC

(0x9D-

0xA1)

OP Mixer 2

(I C 0xF5 )

4 × 2 Output

Mixer

OP Mixer 7

(I2C 0xF6 )

4 × 3 Output

Mixer

OP Mixer 8

(I C 0xF7 )

4 × 3 Output

Mixer

Master Vol

(0xXX)

Max VOL

THD Management

xE9, xEA

L to PWM1

R to PWM2

C to PWM7

Sub to PWM8

4 DAP

(0x7D-

0x80

TAS5548

SLES270A – NOVEMBER 2012 – REVISED APRIL 2015

www.ti.com

(1)

Default inputs

Figure 24. TAS5548 Architecture With I2C Registers in 192kHz Native Mode (fS = 176.4 kHz or fS = 192

kHz)

Figure 25. TAS5548 Detailed Channel Processing

7.4.10 I 2C Coefficient Number Formats

The architecture of the TAS5548 is contained in ROM resources within the device and cannot be altered.

However, mixer gain, level offset, and filter tap coefficients, which can be entered via the I2C bus interface,

provide a user with the flexibility to set the TAS5548 to a configuration that achieves system-level goals.

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