TAS5548DCAR datasheet(59/116 Pages) TI1

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TAS5548

www.ti.com

SLES270A – NOVEMBER 2012 – REVISED APRIL 2015

7.6.2 Serial-Control Interface Register Definitions

Unless otherwise noted, the I2C register default values are in bold font.

Note that u indicates unused/reserved bits.

7.6.2.1 General Status Register 0 (0x01)

Table 15. General Status Register Format

FUNCTION

Identification code for TAS5548

7.6.2.2 Error Status Register (0x02)

Note that the error bits are sticky bits that are not cleared by the hardware. This means that the software must

clear the register (write zeroes) and then read them to determine if there are any persistent errors. Bits D7-D4

are reserved.

Table 16. Error Status Register (0x02)

FUNCTION

–

Frame Slip

–

Clip Indicator

–

Faultz

No Errors

7.6.2.3 System Control Register 1 (0x03)

Bits D1 and D0 are Reserved.

Table 17. System Control Register-1 Format

Function

–

PWM high pass disabled

–

PWM high pass enabled

–

PSVC HIZ Enable

–

PSVC HIZ Disable

–

Soft Unmute on Recovery from Clock Error

–

Hard Unmute on Recovery from Clock Error

–

All Channel enable

–

All Channel Shutdown

–

Enable Clock Auto Detect (Always set to 0 for correct operation)

–

Disable Clock Auto Detect

–

PWM MidZ Enable (No By-pass)

–

PWM MidZ Bypass

–

Reserved: Do not change B0 and B1 from 00.

–

Reserved:

–

Reserved:

–

Reserved:

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