| Electronic Components Datasheet Search |
|
TAS5548DCAR Datasheet(PDF) 91 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TAS5548DCAR Datasheet(HTML) 91 Page - Texas Instruments |
|
91 / 116 page ![]() TAS5548 www.ti.com SLES270A – NOVEMBER 2012 – REVISED APRIL 2015 7.6.2.42 PSVC Range Register (0xDF) Bits D31–D2 are zero. Table 76. PSVC Range Register Format D31–D2 D1 D0 FUNCTION 0 0 0 12.04-dB control range for PSVC 0 0 1 18.06-dB control range for PSVC 0 1 0 24.08-dB control range for PSVC 0 1 1 Ignore – retain last value 7.6.2.43 General Control Register (0xE0) Bits D31–D4 are zero. Bit D0 is reserved. Table 77. General Control Register Format D31–D4 D3 D2 D1 D0 FUNCTION – – 0 – Normal – – 1 - Lineout/6 Channel mode (6Channels will be pwm processed) 0 0 – – Power Supply Volume Control Disable 0 1 – – Power Supply Volume Control Enable 0 0 – – – Subwoofer Part of PSVC 0 1 – – – Subwoofer Separate from PSVC 7.6.2.44 96kHz Dolby Downmix Coefficients (0xE3 to 0xE8) Each gain coefficient is in 28-bit (5.23) format, so 0x80 0000 is a gain of 1. Each gain coefficient is written as a 32-bit word with the upper four bits not used. For eight gain coefficients, the total is 32 bytes. Table 78. 96kHz Dolby Downmix Coefficients I2C REGISTER DEFAULT TOTAL DESCRIPTION OF CONTENTS BYTES SUBADDRESS Fields STATE 0xE3 4 dolby_COEF1L_ 96kHz SDIN1-left to SDOUT-left down-mix coefficient (default = 00 29 03 33 96k 1/3.121) . This is also the coefficient for SDIN1-right to SDOUT-right. 0xE4 4 dolby_COEF1R 96kHz SDIN4-left to SDOUT-left down-mix coefficient. This is also the 00 1C FE EF _96k coefficient for SDIN4-left to SDOUT-right. 0xE5 4 TBD 96kHz SDIN2-left to SDOUT-right down-mix coefficient. FF E3 01 11 0xE6 4 TBD 96kHz SDIN2-right to SDOUT-right down-mix coefficient. FF E3 01 11 0xE7 4 TBD 96kHz SDIN2-left to SDOUT-left down-mix coefficient. FF E3 01 11 0xE8 4 TBD 96kHz SDIN2-right to SDOUT-left down-mix coefficient. FF E3 01 11 7.6.2.45 THD Manager Configuration (0xE9 and 0xEA) 0xE9 (4B) THD Manager (pre) - provide boost if desired to clip 0xEA (4B) THD Manager (post) - cut clipping signal to final level Both registers have a 5.23 register format (28bit coefficient) Valid register values 0000 0000 to 0FFF FFFF Writes to upper byte is ignored 0dB default value 0080 0000 max positive value 07 FF FFFF = +24dB negative values 08xx xxxx will invert the signal amplitude Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 91 Product Folder Links: TAS5548 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |