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PEB2256HT Datasheet(PDF) 42 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 42 Page - Infineon Technologies AG |
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42 / 490 page ![]() FALC56 V1.2 PEB 2256 Pin Descriptions Data Sheet 42 2002-08-27 67 68 69 70 D6 A6 B5 D5 RPA RPB RPC RPD O Receive Signaling Marker (RSIGM) PC(1:4).RPC(2:0) = 011 E1: Marks the time slots which are defined by register RTR(4:1) of every received frame on port RDO. T1/J1: Marks the time slots which are defined by register RTR(4:1) of every received frame on port RDO, if CAS-BR is not used. When using the CAS-BR signaling scheme, the robbed bit of each channel every sixth frames is marked, if CAS-BR is enabled by XC0.BRM = 1. O Receive Signaling Data (RSIG) PC(1:4).RPC(2:0) = 100 The received CAS signaling data is sourced by this pin. Time slots on RSIG correlate directly to the time slot assignment on RDO. O Data Link Bit Receive (DLR) PC(1:4).RPC(2:0) = 101 E1: Marks the Sa(8:4)-bits within the data stream on RDO. The Sa(8:4)-bit positions in time slot 0 of every frame not containing the frame alignment signal are selected by register XC0. T1/J1: Marks the DL-bit position within the data stream on RDO. Table 4 Pin Definitions - System Interface (cont’d) Pin No. Ball No. Symbol Input (I) Output (O) Supply (S) Function |
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