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PEB2256HT Datasheet(PDF) 72 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 72 Page - Infineon Technologies AG |
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72 / 490 page ![]() FALC56 V1.2 PEB 2256 Functional Description E1 Data Sheet 72 2002-08-27 slip condition is detected, a negative slip (one frame or one half of the current buffer size is skipped) or a positive slip (one frame or one half of the current buffer size is read out twice) is performed at the system interface, depending on the difference between RCLK and the current working clock of the receive backplane interface. I.e. on the position of pointer R and W within the memory. A positive/negative slip is indicated in the interrupt status bits ISR3.RSP and ISR3.RSN. Figure 19 The Receive Elastic Buffer as Circularly Organized Memory Limits for Slip Detection (mode dependent) Read Pointer (System Clock controlled) Write Pointer (Route Clock controlled) R’ S+, S- R : : W: Frame 2 Time Slots S- R Frame 1 Time Slots Moment of Slip Detection ITD10952 W S+ Slip |
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