PEB2256HT datasheet(487/490 Pages) INFINEON

487 / 490 page

FALC56 V1.2

PEB 2256

Data Sheet

487

2002-08-27

Index

Address Bus 29

Address Latch Enable 30

Alarm Simulation 118, 186

Application Notes 481

Applications 22, 24

BEC 420

Bit Oriented Message 209

Bit Oriented Messages 137

Bit Robbing 137, 161, 162

Boundary Scan 49, 57, 451, 481

BSN 100, 161

Bus High/Low Enable 31

CAS 76, 77, 101, 137, 161, 162, 193

CCBx 363

CCR1 221, 338

CCR2 224, 341

CCR3 271, 391

CCR4 273, 393

CCR5 274, 394

CEC 418

CEC1 300

CEC2 302

CEC3 303

Channel Associated Signaling 76, 77, 101

Channel Translation Mode 131

Chip Select 31

Clear Channel 153, 155, 162

Clock and Data Recovery 61, 120

Clock of DCO-R 36

Clock of DCO-X 37

Clock Synchronization 36

Clocking Unit 59, 60

CMDR 217, 334

CMDR2 269, 389

CMDR3 269, 389

CMDR4 270, 390

CMR1 258, 378

CMR2 259, 379

COEC 421

CRC16 74, 100, 135, 161

CRC-Multiframe 83

CVC 299, 417

D4 139, 143

Data Bus 29

Data Bus Width 30

Data Link Access 211

Data Link Bit Receive 42

Data Link Bit Transmit 47

Data Strobe 30

DEC 262, 382

Defect Insertion 118, 186

DLR 42

DLX 47

Doubleframe Format 80

EBC 300, 301, 419

Elastic Buffer 70, 97, 129, 157

Error counter 92, 152

ESD 446

ESF 139, 144, 162

ESM 262, 382

F12 139, 140

F24 139, 144, 162

F4 139, 142

F72 139, 140, 211

FEC 298, 416

FIFO Structure 53

FISU 74, 100, 135, 161

FMR0 228, 345

FMR1 230, 347

FMR2 232, 349

FMR3 245

FMR4 352

PEB2256HT Datasheet(PDF) 487 Page - Infineon Technologies AG

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