Electronic Components Datasheet Search
  English  ▼

X  

AD6679 Datasheet(PDF) 59 Page - Analog Devices

Part # AD6679
Description  135 MHz BW IF Diversity Receiver
PDF  81 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6679 Datasheet(HTML) 59 Page - Analog Devices

Back Button AD6679 Datasheet HTML 55Page - Analog Devices AD6679 Datasheet HTML 56Page - Analog Devices AD6679 Datasheet HTML 57Page - Analog Devices AD6679 Datasheet HTML 58Page - Analog Devices AD6679 Datasheet HTML 59Page - Analog Devices AD6679 Datasheet HTML 60Page - Analog Devices AD6679 Datasheet HTML 61Page - Analog Devices AD6679 Datasheet HTML 62Page - Analog Devices AD6679 Datasheet HTML 63Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 59 / 81 page
background image
Data Sheet
AD6679
Rev. B | Page 59 of 81
VARIABLE DYNAMIC RANGE (VDR)
The AD6679 features a variable dynamic range (VDR) digital
processing block to allow up to 14-bit dynamic range to be
maintained in a subset of the Nyquist band. Across the full
Nyquist band, a minimum of a 9-bit dynamic range is available
at all times. This operation is suitable for applications such as
digital predistortion processing (DPD). The harmonic
performance of the receiver is unaffected by this feature. When
enabled, VDR does not contribute loss to the input signal but
operates by effectively changing the output resolution at the
output pins. This feature can be independently controlled per
channel via the SPI.
The VDR block operates in either complex or real mode. In
complex mode, VDR has selectable bandwidths of 25% and 43%
of the output sample rate. In real mode, the bandwidth of
operation is limited to 25% of the output sample rate. The
bandwidth and mode of the VDR operation are selected by
setting the appropriate bits in Register 0x430.
When the VDR block is enabled, input signals that violate a
defined mask (signified by gray shaded areas in Figure 80)
result in the reduction of the output resolution of the AD6679.
The VDR block analyzes the peak value of the aggregate signal
level in the disallowed zones to determine the reduction of the
output resolution. To indicate that the AD6679 is reducing
output, the VDR punish bit or a VDR high/low resolution bit
can optionally be on the STATUS±/OVR± pins by programming
the appropriate value into Register 0x559. The VDR high/low
resolution bit can alternatively be programmed to output on the
STATUS± pins and simply indicates if VDR is reducing output
resolution (bit value is a 1), or if full resolution is available (bit
value is a 0). These VDR high/low resolution and VDR punish
bits can be decoded by using Table 27. Note that only one can
be output at a given time.
Table 27. VDR Reduced Output Resolution Values
VDR Punish Bit
VDR High/Low
Resolution Bit
Output Resolution
(Bits)
0
Not applicable
14 or 13
1
Not applicable
≤12
Not applicable
0
14
Not applicable
1
≤13
The frequency zones of the mask are defined by the bandwidth
mode selected in Register 0x430. The upper amplitude limit for
input signals located in these frequency zones is −30 dBFS. If
the input signal level in the disallowed frequency zones goes
above an amplitude level of −30 dBFS (into the gray shaded
areas), the VDR block triggers a reduction in the output
resolution, as shown in Figure 80. The VDR block engages and
begins limiting output resolution gradually as the signal
amplitudes increase in the mask regions. As the signal
amplitude level increases into the mask regions, the output
resolution is gradually lowered. For every 6 dB increase in
signal level above −30 dBFS, one bit of output resolution is
discarded from the output data by the VDR block, as shown in
Table 28. These zones can be tuned within the Nyquist band by
setting Bits[3:0] in Register 0x434 to determine the VDR center
frequency (fVDR). The VDR center frequency in complex mode
can be adjusted from 1/16 fS to 15/16 fS in 1/16 fS steps. In real
mode, fVDR can be adjusted from 1/8 fS to 3/8 fS in 1/16 fS steps.
Table 28. VDR Reduced Output Resolution Values
Signal Amplitude Violating Defined
VDR Mask
Output Resolution
(Bits)
Amplitude ≤ −30 dBFS
14
−30 dBFS < amplitude ≤ −24 dBFS
13
−24 dBFS < amplitude ≤ −18 dBFS
12
−18 dBFS < amplitude ≤ −12 dBFS
11
−12 dBFS < amplitude ≤ −6 dBFS
10
−6 dBFS < amplitude ≤ 0 dBFS
9
dBFS
–30
0
INTERMODULATION PRODUCTS < –30dBFS
INTERMODULATION PRODUCTS > –30dBFS
fS
0
fS
Figure 80. VDR Operation—Reduction in Output Resolution



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com