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DP83924 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP83924
Description  Quad 10 Mb/s Ethernet Physical Layer - 4TPHY?
PDF  42 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83924 Datasheet(HTML) 3 Page - National Semiconductor (TI)

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Table of Contents
1.0
Pin Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1
Pin Connection Diagram . . . . . . . . . . . . . . . . . . . . 4
1.2
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.0
Interface Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . .9
2.1
Management Interface . . . . . . . . . . . . . . . . . . . . . .9
2.2
MAC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2.3
LED Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.4
Network Interface . . . . . . . . . . . . . . . . . . . . . . . . .10
3.0
Detailed Functional Description . . . . . . . . . . . . . . . . .14
3.1
Twisted Pair Functional Description . . . . . . . . . . 14
3.2
ENDEC Module . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.3
Additional Features . . . . . . . . . . . . . . . . . . . . . . .15
3.4
Auto-negotiation Block . . . . . . . . . . . . . . . . . . . . .17
3.5
JTAG Boundary Scan . . . . . . . . . . . . . . . . . . . . .18
4.0
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . .21
4.1
Register Map and Descriptions . . . . . . . . . . . . . .21
5.0
Application Information . . . . . . . . . . . . . . . . . . . . . . . .27
5.1
Magnetics Specifications . . . . . . . . . . . . . . . . . . .27
5.2
Layout Considerations . . . . . . . . . . . . . . . . . . . . .27
5.3
LED interface considerations . . . . . . . . . . . . . . . .28
6.0
User Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
6.1
CRS Assertion Connected to a 100M Node . . . . 29
6.2
Link Fail Inhibit Timer . . . . . . . . . . . . . . . . . . . . . .29
6.3
Lockup during duplex mode change: . . . . . . . . . . 29
6.4
Start of TP_IDL, 45 Bit Times to 50 mV: . . . . . . . 29
6.5
Polarity detection: . . . . . . . . . . . . . . . . . . . . . . . .29
6.6
Link pulse template: . . . . . . . . . . . . . . . . . . . . . . .30
7.0
AC and DC Electrical Specifications . . . . . . . . . . . . .31
7.1
DC Specifications . . . . . . . . . . . . . . . . . . . . . . . .31
7.2
AC Switching Specifications . . . . . . . . . . . . . . . .32
8.0
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . .42



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