DP83924 datasheet(5/42 Pages) NSC

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1.0 Pin Information (Continued)

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1.2 Pin Description

Table 1. NRZ CONTROLLER INTERFACE and MANAGEMENT INTERFACE.

These pins provide the interface signalling between the Media Access Controller and the transceiver. (30 Pins)

Symbol

Pin #

Type

Description

TXC

Transmit Clock: This pin outputs a 10 MHz output clock signal synchronized to the

transmit data (for all ports).

TXD[4]

TXD[3]

TXD[2]

TXD[1]

Transmit Data: The serial TXD contains the transmit serial data output stream.

TXE[4]

TXE[3]

TXE[2]

TXE[1]

Transmit Enable: This active high input indicates the presence of valid data on the TXD

pins.

CRS[4]

CRS[3]

CRS[2]

CRS[1]

O, pull-up

Carrier Sense: Active high output indicates that valid data has been detected on the

receive inputs.

CRS[3:1] are dual purpose pins. When RESET is active, the value on these pins are

sampled to determine the transceiver address for the mgmt interface. These pins have

internal pull-ups, a 2.7 k

Ω pull down resistor is required to program a logic ‘0’.

COL[4]

COL[3]

COL[2]

COL[1]

O, pull-up

Collision: This active high output is asserted when a collision condition has been de-

tected. It is also asserted for 1

µs at the end of a packet to indicate the SQE test function.

COL[4:1] are dual purpose pins. When RESET is active, these pins are sampled and

selects the operating mode for the device. These pins have internal pull-ups to select

the default mode if no external pull-downs are connected. To select the non-default

mode(s), a 2.7 k

Ω pull down resistor(s) is required. The strappable functions are:

COL[4]; selects the number of receive clocks after carrier sense deassertion (5 RXCs

or continuous RXCs). Default is 5 RXCs.

COL[3]; enables or disables the receive filter. Default is to disable the receive filter.

COL[2]; Disables Management Interface and selects the Full Duplex operating mode

(normal or enhanced). Default is normal full duplex mode. If the enhanced Full- Duplex

mode is selected, the functions of pins 89, 90, 92, 93, and 94 are also changed. See

the descriptions in Sectio n3.3.13 and Se ction3.3.14.

COL[1]; selects the LED operating mode (normal or enhanced). Default is normal LED

mode.

RXC[4]

RXC[3]

RXC[2]

RXC[1]

Receive Clock: This 10 MHz signal is generated by the transceiver, and is the recov-

ered clock from the decoded network data stream. This signal is 10 MHz.

The number of RXCs after the deassertion of CRS is programmable via the Global Con-

figuration Register, GATERXC bit, D0. The options are for 5 RXCs or continuous RXCs.

RXD[4]

RXD[3]

RXD[2]

RXD[1]

O, Pull-up Receive Data: Provides the decoded receive serial data. Data is valid on the risin

edge of RXC.

RXD[4:1] are dual purpose pins. When RESET is active, these pins are sampled and

selects the operating mode for the device. These pins have internal pull-ups to select

the default mode if no external pull-downs are connected. To select the non-default

mode(s), a 2.7 k

Ω pull down resistor(s) is required. The strappable functions are:

RXD[4] enables/disables Auto-Negotiation.

RXD[3:1] selects one of five MAC interface modes. See the table in the Interface De-

scriptions section.

MDC

LPBK

Management Data Clock: When management interface is enabled (strap option,

COL[2]=1), this clock signal (0-2.5MHz) is the clock for transferring data across the

management interface.

LoopBack: When “Disable Management Interface” mode is selected (strap option,

COL[2]=0), then this pin is an active high input to configure all ports into diagnostic loop-

back mode.

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