ATMEGA88 datasheet(69/349 Pages) ATMEL

69 / 349 page

ATmega48/88/168

2545D–AVR–07/04

MCU Control Register –

MCUCR

• Bit 4 – PUD: Pull-up Disable

When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn

and PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01).

See “Configuring the Pin” on page 63 for more details about this feature.

Alternate Functions of Port B

The Port B pins with alternate functions are shown in Table 33.

The alternate pin configuration is as follows:

• XTAL2/TOSC2/PCINT7 – Port B, Bit 7

XTAL2: Chip clock Oscillator pin 2. Used as clock pin for crystal Oscillator or Low-fre-

quency crystal Oscillator. When used as a clock pin, the pin can not be used as an I/O

pin.

TOSC2: Timer Oscillator pin 2. Used only if internal calibrated RC Oscillator is selected

as chip clock source, and the asynchronous timer is enabled by the correct setting in

ASSR. When the AS2 bit in ASSR is set (one) and the EXCLK bit is cleared (zero) to

enable asynchronous clocking of Timer/Counter2 using the Crystal Oscillator, pin PB7 is

disconnected from the port, and becomes the inverting output of the Oscillator amplifier.

In this mode, a crystal Oscillator is connected to this pin, and the pin cannot be used as

an I/O pin.

Bit

–

–PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

Table 33. Port B Pins Alternate Functions

Port Pin

Alternate Functions

PB7

XTAL2 (

Chip Clock Oscillator pin 2)

TOSC2 (

Timer Oscillator pin 2)

PCINT7 (Pin Change Interrupt 7)

PB6

XTAL1 (

Chip Clock Oscillator pin 1 or External clock input)

TOSC1 (

Timer Oscillator pin 1)

PCINT6 (Pin Change Interrupt 6)

PB5

SCK (SPI Bus Master clock Input)

PCINT5 (Pin Change Interrupt 5)

PB4

MISO (SPI Bus Master Input/Slave Output)

PCINT4 (Pin Change Interrupt 4)

PB3

MOSI (SPI Bus Master Output/Slave Input)

OC2A (Timer/Counter2 Output Compare Match A Output)

PCINT3 (Pin Change Interrupt 3)

PB2

SS (SPI Bus Master Slave select)

OC1B (Timer/Counter1 Output Compare Match B Output)

PCINT2 (Pin Change Interrupt 2)

PB1

OC1A (Timer/Counter1 Output Compare Match A Output)

PCINT1 (Pin Change Interrupt 1)

PB0

ICP1 (Timer/Counter1 Input Capture Input)

CLKO (Divided System Clock Output)

PCINT0 (Pin Change Interrupt 0)

ATMEGA88 Datasheet(PDF) 69 Page - ATMEL Corporation

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