DS3875 datasheet(36/58 Pages) NSC

36 / 58 page

70 Register Description (Continued)

76 CTRL2

(ADD(30) e 0100)

Control register 2 This register stores two parameters FS

(FastSlow) and DS

(RestrictedUnrestricted) that configure the

controller to operate in the chosen mode PD(53) selects one of eight delays for the fast module and PD(20) selects one of

eight delays for the slow module Defaults to h 00

543210

PD5

PD4

PD3

PD2

PD1

PD0

Bit

Symbol

Description

0 – 5

PD0 – PD5

Programs the arbitration delay that is timed in a competition These bits give a total of

16 selectable delays 8 fast and 8 slow PD0 – PD2 select the slow module’s delay and

PD3 – PD5 select the fast module’s delay

(PD5 PD4 PD3)

Fast

(PD2 PD1 PD0)

Slow

000

100

000

125

001

120

001

165

010

145

010

210

011

165

011

255

100

190

100

300

101

210

101

345

110

235

110

385

111

255

111

430

RestrictedUnrestricted

Configures the controller to arbitrate in unrestricted mode

Configures the controller to arbitrate in restricted mode

FastSlow

Configures the controller as a slow module

Configures the controller as a fast module

77 CTRL3

(ADD(30) e 0101)

Defaults to h 00

TCSEL

IBA

NCN

NGO

Bit

Symbol

Description

GO Bit

indicates that all the required initialization is complete and the controller may accept

requests

the controller will follow the normal flow of arbitration along with other modules

(bystander)

DoubleSingle

Configures the controller to arbitrate in a single pass arbitration mode

Configures the controller to arbitrate in a two pass arbitration mode

NGO

A ‘‘one’’ indicates that a new GO bit has been loaded This bit is reset automatically when the new

GO bit takes effect To be set by the user when the GO bit is changed

3ND

A ‘‘one’’ indicates that a new D

S bit has been loaded This bit is reset automatically when the new

S bit takes effect To be set by the user when the D

S bit is changed

NCN

A ‘‘one’’ indicates that a new CN has been loaded This bit is reset automatically when the new CN

takes effect This bit is set internally when TXCN1 is accessed while the GO bit is set

IBA

Idle Bus ArbitrationParking

Configures the controller to do Idle Bus Arbitration

Configures the controller to do Parking

TCSEL

A ‘‘one’’ indicates that a test clock is being fed through the CLK pin to test the timers and counters in

the controller

DS3875 Datasheet(PDF) 36 Page - National Semiconductor (TI)

DS3875 Datasheet(HTML) 36 Page - National Semiconductor (TI)

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