| Electronic Components Datasheet Search |
|
DS3875 Datasheet(PDF) 17 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
DS3875 Datasheet(HTML) 17 Page - National Semiconductor (TI) |
|
17 / 58 page ![]() 50 Arbitrating for Futurebusa (Continued) TLH10747 – 10 d Message Receiving TLH10747 – 11 e Message Sending FIGURE 5 Bus Request Timing (Normal Arbitration Idle Bus Arbitration and Parking) (Continued) 54 FUTUREBUSa OPTIONAL MEANS OF ARBITRATION Besides the normal Futurebusa Parallel Contention Arbitra- tion the Futurebusa Specification allows two other option- al arbitration methods to acquire the parallel bus quickly Idle Bus Arbitration Parking Both of these arbitration methods are supported by the Na- tional Semiconductor DS3875 Arbitration Controller 541 Idle Bus Arbitration (IBA) Idle Bus Arbitration (IBA) is selected by setting the IBAPK bit in CTRL3 register The aim of IBA is to give a module quick access to Futurebusa when the current master has completed its transfers IBA is invoked the same as a normal arbitration bus request ( BRQ ) but uses the parallel bus (AS negated DS as- serted and the parallel addressdata bus) to determine the winner of the arbitration cycle see Figure 5a b During normal arbitration the transfer of Futurebusa tenure occurs during phase 5 During IBA the transfer of Future- busa tenure occurs during phase 2 During IBA the AC1O arbitration condition signal will be asserted by the new mas- ter This will cancel the transfer of tenure during the normal arbitration cycle Note that Futurebusa tenure was trans- ferred but only the two modules involved in the IBA (the master and the master elect) know that the transfer of ten- ure has taken place All the other modules involved in the normal arbitration cycle see that the transfer of tenure dur- ing the normal arbitration cycle was canceled If two or more modules have a request then normal arbitra- tion will determine which module will gain access IBA takes place on the parallel highway ADDATA (31 0) Each module is assigned a bit which is to be asserted during IBA If only one bit is asserted during the IBA competition then IBA issues the bus grant signal to that module Concurrently with IBA normal arbitration takes place If a module does not want IBA to issue a bus grant IBA may be inhibited by asserting DI During phase 5 normal arbitration will deter- mine appropriate actions 5411 Masters Support Circuitry to Enable IBA If IBA is allowed it is invoked during phase 0 In order to support IBA external logic is needed in addition to the arbi- tration controller The Masters external logic must monitor the arbitration control acquisition synchronization signals (AP AQ AR ) and the parallel bus address handshake signals (AS AK AI ) If the master supports IBA it should wait until it is ready to end its bus tenure (ENDT asserted) Then when it releases AS it should assert ds to enable modules to participate in IBA competition 5412 Modules Support Circuitry to Participate in IBA If a module wants to use IBA to gain tenure of Futurebusa it must use external logic to monitor the arbitration control 17 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |