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TSB43AB21 Datasheet(PDF) 7 Page - Texas Instruments |
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TSB43AB21 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 109 page  vii 3–14 MIN_GNT and MAX_LAT Register Description 3–12 . . . . . . . . . . . . . . . . . . . . . 3–15 OHCI Control Register Description 3–13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–16 Capability ID and Next Item Pointer Registers Description 3–13 . . . . . . . . . . . . 3–17 Power Management Capabilities Register Description 3–14 . . . . . . . . . . . . . . . 3–18 Power Management Control and Status Register Description 3–15 . . . . . . . . . 3–19 Power Management Extension Registers Description 3–15 . . . . . . . . . . . . . . . . 3–20 PCI PHY Control Register 3–16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–21 Miscellaneous Configuration Register 3–17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–22 Link Enhancement Control Register Description 3–18 . . . . . . . . . . . . . . . . . . . . 3–23 Subsystem Access Register Description 3–19 . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–24 General-Purpose Input/Output Control Register Description 3–20 . . . . . . . . . . 4–1 OHCI Register Map 4–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–2 OHCI Version Register Description 4–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 GUID ROM Register Description 4–5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–4 Asynchronous Transmit Retries Register Description 4–6 . . . . . . . . . . . . . . . . 4–5 CSR Control Register Description 4–7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–6 Configuration ROM Header Register Description 4–8 . . . . . . . . . . . . . . . . . . . . 4–7 Bus Options Register Description 4–9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–8 Configuration ROM Mapping Register Description 4–11 . . . . . . . . . . . . . . . . . . . 4–9 Posted Write Address Low Register Description 4–11 . . . . . . . . . . . . . . . . . . . . 4–10 Posted Write Address High Register Description 4–12 . . . . . . . . . . . . . . . . . . . . 4–11 Host Controller Control Register Description 4–13 . . . . . . . . . . . . . . . . . . . . . . . . 4–12 Self-ID Count Register Description 4–15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–13 Isochronous Receive Channel Mask High Register Description 4–16 . . . . . . . 4–14 Isochronous Receive Channel Mask Low Register Description 4–17 . . . . . . . . 4–15 Interrupt Event Register Description 4–18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–16 Interrupt Mask Register Description 4–20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–17 Isochronous Transmit Interrupt Event Register Description 4–22 . . . . . . . . . . . 4–18 Isochronous Receive Interrupt Event Register Description 4–23 . . . . . . . . . . . 4–19 Initial Bandwidth Available Register Description 4–24 . . . . . . . . . . . . . . . . . . . . . 4–20 Initial Channels Available High Register Description 4–25 . . . . . . . . . . . . . . . . . 4–21 Initial Channels Available Low Register Description 4–25 . . . . . . . . . . . . . . . . . 4–22 Fairness Control Register Description 4–26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–23 Link Control Register Description 4–27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–24 Node Identification Register Description 4–28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–25 PHY Control Register Description 4–29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–26 Isochronous Cycle Timer Register Description 4–30 . . . . . . . . . . . . . . . . . . . . . . 4–27 Asynchronous Request Filter High Register Description 4–31 . . . . . . . . . . . . . 4–28 Asynchronous Request Filter Low Register Description 4–33 . . . . . . . . . . . . . . 4–29 Physical Request Filter High Register Description 4–34 . . . . . . . . . . . . . . . . . . . 4–30 Physical Request Filter Low Register Description 4–36 . . . . . . . . . . . . . . . . . . . 4–31 Asynchronous Context Control Register Description 4–37 . . . . . . . . . . . . . . . . . 4–32 Asynchronous Context Command Pointer Register Description 4–38 . . . . . . . 4–33 Isochronous Transmit Context Control Register Description 4–39 . . . . . . . . . . |
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