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TSB43AB21 Datasheet(PDF) 30 Page - Texas Instruments |
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TSB43AB21 Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 109 page ![]() 3–9 3.11 CardBus CIS Base Address Register If CARDBUS is sampled high on a G_RST, this 32-bit register returns 0s when read. If CARDBUS is sampled low, this register is programmed with a base address referencing the memory-mapped card information structure (CIS). This register must be programmed with a nonzero value before the CIS can be accessed. See Table 3–10 for a complete description of the register contents. Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Name CardBus CIS base address Type R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name CardBus CIS base address Type R/W R/W R/W R/W R/W R R R R R R R R R R R Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Register: CardBus CIS base address Offset: 18h Type: Read/Write, Read-only Default: 0000 0000h Table 3–10. CardBus CIS Base Address Register Description BIT FIELD NAME TYPE DESCRIPTION 31–11 CIS_BASE R/W CIS base address. This field specifies the upper 21 bits of the 32-bit CIS base address. If CARDBUS is sampled high on a G_RST, this field is read-only, returning 0s when read. 10–4 CIS_SZ R CIS address space size. This field returns 0s when read, indicating that the CIS space requires a 2K-byte region of memory. 3 CIS_PF R CIS prefetch. Bit 3 returns 0 when read, indicating that the CIS is nonprefetchable. Furthermore, the CIS is a byte-accessible address space, and either a doubleword or 16-bit word access yields indeterminate results. 2–1 CIS_MEMTYPE R CIS memory type. This field returns 0s when read, indicating that the CardBus CIS base address register is 32 bits wide and mapping can be done anywhere in the 32-bit memory space. 0 CIS_MEM R CIS memory indicator. Bit 0 returns 0 when read, indicating that the CIS is mapped into system memory space. |
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